SPI的核心源代码，verilog

spi-slave通信的vhdl实现及其仿真(VHDL implementation of spi-slave communication)

简单uart，verilog语言编写，已经经过测试，有需要的可以看看(Simple uart, Verilog language, has been tested, you can see if you need it)

通过FPGA实现整数阶混沌系统，通过定点数的方式，全并行。(The realization of integer order chaotic systems through FPGA)

一个VEILOG HDL程序，可以直接应用，-A VEILOG HDL procedures, can be applied directly,

VHDL写的8051内核,可用的,好用,有兴趣可下载,在外国网站下载的-write VHDL 8051 kernel, available, convenient, can be downloaded interested in the foreign website

fpga clock 设计，资料较好，供大家参考，非商用目的哦-fpga clock design, the information is better, for your reference, non-commercial purposes Oh

文利用直接数字频率合成器(DDS)与CPLD技术和单片机控制技术，研制和 设计了高分辨率、高稳定度的函数信号发生(Wen using direct digital frequency synthesizer (DDS) and CPLD technology and single-chip microcomputer control technology, development and Design of high resolution, high stability function of the signal )

at070tn83 800x480 tft lcd verilog 測試 quartus 文件 (800x480 tft lcd at070tn83 testing project file)

program send sms by sim900 module

this is the vhdl code for the arithmetic logic unit.enjoy!