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fwwallace
wallace tree multiplier in verrilog
- 2013-03-19 00:15:07下载
- 积分:1
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costas_DPSK
采用costas环进行DPSK解调的程序。输入数据速率2.4Kbps,载波频率12KHz,采样率1.6MHz, 输入数据位宽12位,快捕带为799.617Hz(Costas ring using DPSK demodulation process. Input data rate 2.4Kbps, carrier frequency 12KHz, sampling rate 1.6MHz, the input data 12 bits wide, fast catching band is 799.617Hz)
- 2014-06-09 21:50:42下载
- 积分:1
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Buffer-DAQ
基于研华采集卡的FIFO双缓存区高速数据采集(FIFO DAQ)
- 2015-01-11 19:09:49下载
- 积分:1
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ser_par
24bitAD数据采样进行串并转换,并行输出。另包括24位DA并串转换,串行输出。(24bitAD data sampling and converted to strings, parallel output. Other notable features include 24-bit DA and string conversion, serial output.)
- 2009-12-10 15:46:54下载
- 积分:1
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PCIeData-Link-Layer-Specifications
PCIe数据链路层的协议详解,对做PCIe接口有非常重要的指导价值。(PCIe data link layer protocol detailed, do PCIe interface very important value.)
- 2012-08-31 12:33:15下载
- 积分:1
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AMBA APB桥VHDL
这是一个AMBA APB桥实现VHDL。这包括主人,奴隶和试验台试验桥。我已经测试功能。
- 2022-06-02 20:02:44下载
- 积分:1
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4BITMUIT
利用LPM_MUIT宏模块设计一个四位数据乘法器(Use LPM_MUIT macro module design a four data Multiplier)
- 2013-09-05 10:06:52下载
- 积分:1
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1553B-BC-TEST
1553B总线BC端的编程例子,做通了对于一个RT的测试。对于其他的RT测试和程序的例子原理相同。(The BC end of the 1553B bus programming examples)
- 2020-12-06 21:29:21下载
- 积分:1
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JIAOTONGDENG
用VERILOG实现 交通灯控制,且运行正确,希望有帮助(Use VERILOG implementation traffic light control, and operation right, hope to have help)
- 2014-01-05 20:38:03下载
- 积分:1
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Six-phase-Motor-Based-on-DSP
说明: 设计了六相感应电机的控还原
制平台的硬件结构及其各个组成部分,控制平台结构主要由DSP控制系统和主驱动电路系统以及检测电路系统组成。控制系统采用TI公司的TMS320F2812快速DSP控制芯片。
(This paper designs the hardware structure of the six-phase motor control system and introduces every component. The control platform consists of DSP control system, main drive circuit system and detection circuit system .The control system adopts TMS320F2812 DSP chip of TI Company. 更多还原
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- 2011-03-01 12:08:36下载
- 积分:1