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使用VHDL编写的分频程序,能进行任意次的偶数分频,程序简单易懂,供
初学者参考...
使用VHDL编写的分频程序,能进行任意次的偶数分频,程序简单易懂,供
初学者参考-prepared by the use of VHDL-frequency procedures can make even the random frequency, the procedures are simple and easy to understand. reference for beginners
- 2022-02-12 09:25:12下载
- 积分:1
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can-lite-vhdl-master
说明: CAN VHDL Code. Behavioral implementation of CAN bus interface.
- 2021-01-19 21:48:41下载
- 积分:1
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用Bresenham算法在FPGA上实现小数分频器,verilog编写,计算机图形法...
用Bresenham算法在FPGA上实现小数分频器,verilog编写,计算机图形法-Bresenham algorithm used in the FPGA to achieve a small number of crossovers, verilog preparation, computer graphics method
- 2022-03-11 03:26:38下载
- 积分:1
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vhdl
说明: 这个事VHDL基础知识,内面主要内容是编码器的插V过程,值得下载学习!(it is really useful for those who never touch it!)
- 2010-04-16 13:57:35下载
- 积分:1
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阅读FPGA的SRAM中,然后通过对几个CY7C68013
FPGA读SRAM中的数再传给CY7C68013-Reading SRAM in the FPGA, then pass on a few CY7C68013
- 2023-07-28 03:05:04下载
- 积分:1
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PSK
实现psk调制解调,vhdl代码,仿真文件也有(psk shixian tiaozhiyujietiao)
- 2013-04-10 14:24:53下载
- 积分:1
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双向移位寄存器的VHDL源程序,自己做实验编写的可以用 谢谢大家...
双向移位寄存器的VHDL源程序,自己做实验编写的可以用 谢谢大家-Bi-directional shift register of the VHDL source code, prepared by their own experiments can be used Thank you
- 2022-02-11 10:52:42下载
- 积分:1
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Verilog written procedures for counting frequency meter module,
verilog写的频率计程序的计数模块,-Verilog written procedures for counting frequency meter module,
- 2022-03-20 18:03:19下载
- 积分:1
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Frame-synchronization
FPGA 帧同步源代码 调试无错误 ALTERA 平台(Frame synchronization
FPGA)
- 2011-06-21 10:41:22下载
- 积分:1
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Ping_pong_Sparten3e-master
说明: FPGA实现乒乓球游戏 代码及仿真 VGA实现(FPGA realizes table tennis game code and simulation VGA implementation)
- 2019-05-06 20:22:13下载
- 积分:1