vhdl子程序，本人收集的，比较常用的代码

这个并串转换代码是依靠同步状态机来实现其控制的。其实并串转换在实际的电路中使用还是比较多的，尤其在通信线路方面的复用和分解方面，原理上就是一个串并转换和并串转换的过程。举个简单的例子，计算机串口发送数据的过程，如果满足发送条件了，其实就是一个并串转换的过程了。好了，废话不说，看代码就是。 -And the string conversion of the code is relying on the synchronization state machine to achieve its control. In fact, string conversion circuit in the actual use of, or more, particularly in the area of communication lines and the decomposition of reuse, the principle is a string and the conversion and the conversion process and string. Here is a simple example, the computer serial port of the process of sending data, if sent to meet the conditions, but in fact is a process of conversion and a string. Well, do not talk nonsense, look at the code is.

说明：  八通道ad采集，用于和fpga的联调测试，需要注意ADS1278的模式类型(Eight channel AD acquisition)

多相滤波系统的设计与实现，有MATLAB仿真程序，有sysgen的系统仿真，还有VHDL代码，其中还有FIR的系数参数等等(Polyphase filter system, the design and implementation includes a MATLAB simulation program, sysgen system simulation, and VHDL code, including FIR coefficient parameters, and so on )

定时器的编程，vhdl语言，可以实现24时制定时器-Timer programming, vhdl language, can be achieved when the system timer 24

这是一个计算机组成原理综合性实验：设计8位cpu。该cpu是8bit的代码，包含有4个寄存器，一个存储器，还有alu以及控制器。一共可以实现16条指令。(This is a computer composition principle of comprehensive experiment: Design 8 cpu. The cpu is 8bit code contains four registers, a memory, as well as alu and controllers. A total of 16 instructions can be achieved.)

TLC5620驱动程序包括其他文件,8位，4通道，电压输出型DAC的数模转换器(TLC5620 driver and doc)

de2 vga控制器，也可用于其他板子开发-de2 vga controller board can also be used for other development

verilog HDL 4×4矩阵键盘驱动程序包括硬件电路图-verilog

调整iq幅度不平衡的模块，可以解决载漏和边带问题。(Iq amplitude imbalance adjustment module can be resolved carrier and sideband leakage problems.)

使用VHDL语言编程，烧录在芯片运行的倒数5秒响4声短铃最后一声长音的数字钟-The use of VHDL language programming, burn in the chip to run the last 5 seconds short bell ring 4 final say sound a long tone of digital clock