《Verilog HDL 程序设计教程》9

EV10AQ190A配置程序 EV10AQ190A configuration program(EV10AQ190A configuration program)

DDS信号源设计，有正弦波，方波，三角波，AM波，FM波，还有PSK,FSK,16QAM等多种信号产生。(DDS signal source design, there are sine, square wave, triangle wave, AM wave, FM wave, as well as PSK, FSK, 16QAM and other signal generation.)

关于VHDL和verilog的数码管显示程序，写的很好，值得参考。(About VHDL and verilog digital tube display program, write well, worth considering.)

该工程是基于verilog hdl 语言编写的帧传输协议HDLC帧的发送端代码，会用QUATUSII的人都应该知道如何使用，希望能给你带来帮助-The project is based on the language verilog hdl frame transmission protocol HDLC frame of this generation- Codes will be used QUATUSII people should know how to use, in the hope of giving you helpful

cpld/fpga RS(204,188)译码器的verilog程序-cpld/fpga RS (204,188) decoder of the Verilog program

Quartus? II 相关的语言 详细介绍了VHDL verilog软件开发过程(Quartus ? II related language detailed introduces the verilog VHDL software development process )

说明：  offset_cancellation code for matlab to hdl

经典的OV5642的verilog驱动程序(Verilog Driver of Classic OV5642)

XVRWARE Library Xilinx Inc. The XVRWARE Synthesis library provides macros and synthesis examples for constructing TMR circuits in VHDL for the Virtex architecture

4X4 KEYPAD 的输入位数计数器，可以自己定义输入的位数-4x4 KEYPAD median counter input, input their own definition of the median