8051核的vhdl原代码。

基于ALtera公司的若干款FPGA的调试经验，对初学者有重要价值-ALtera a number of sections based on the company" s FPGA debugging experience, great value for beginners

六十进制计数器，VHDL编写的计数器，本科电子的可能有些实验可以用到(counter Possible experiments of undergraduate electronics can be used)

在FPGA中编写FPGA芯片与DSP28335进行通信的程序(FPGA chip and DSP28335 written in FPGA communication program)

dp_xiliux 的 CPLD Verilog设计实验,串口演示.代码测试通过. -dp_xiliux the CPLD Verilog design experiments, serial presentation. code test.

这个我也太清楚是什么 反正师兄们说有用 发大家-I am also very clear that what is useful anyway, say senior U.S. fa

UART 源码 (lattice version)-UART source (lattice version)

用VERILOG编写的数字电子钟，用数码管进行显示时间-VERILOG prepared with digital electronic clock with a nixie tube display time

基于fpga和sopc的用VHDL语言编写的EDA的32位Nios CPU嵌入式系统及其DMA设计俄罗斯方块游戏机(FPGA and SOPC based on the use of VHDL language EDA 32-bit Nios CPU and the DMA design of embedded systems Tetris game)

FIR filter basic verilog code for implementation-FIR filter basic verilog code for implementation

flash接口控制器的VHDL以及verilog源代码和Testbench程序-flash interface controller VHDL and Verilog source code and procedures Testbench