FPGA做从设备的IIC逻辑

verilog ad9777 ad芯片的配置程序，SPI接口协议 16bit DA(Verilog ad9777 AD chip configuration program, SPI interface protocols for 16 bit DA)

采用verilog编写的经典的cordic算法，旋转模式，亲测可用，经过了9次旋转。cordic算法采用不断旋转求出正弦余弦值，是一种有效地迭代算法

LDPC码的FPGA实现，大家相互学习下。。(the code of LDPC implementation by FPGA)

多频信号通过低通滤波器，使用Verilog语言进行设计，多频信号是正弦信号。

FPGA上机文件一所以在FPGA中采用同 步设计非常重要 MAX+PLUS II可以计算出数据传输需要(fpga Several of the largest chip operating frequency I would be grateful if the output value of counter FFFFC- FE0FF simulation waveform between the print out (only EPF10K70RC240-4 chips, the maximum allowable Clock frequency)

基于FPGA的数字系统设计,包含原理、工程应用和案例。(FPGA-based digital system design, including theory, engineering applications and cases.)

verilog语言实现一个CPU，汇编程序实现汉明编码功能，输入11位代码，输出15位编码结果。(Verilog language to achieve a CPU, assembler to achieve Hamming coding function, enter 11 bit code, output 15 bit encoding results.)

verilog实际例子，非常适合初学者学习(verilog practical examples, very suitable for beginners to learn)

电子设计竞赛中获二等奖，在FPGA中实现的两路自然采样SPWM

ARM7系统IP核的VHDL语言源代码，需要的开发环境是QUARTUS II 6.0。(ARM7 System IP Core VHDL language source code, the need for the development environment is QUARTUS II 6.0.)