verilog spwm

基于DE2开发板的VGA显示模块，仅供大家参考(DE2 development board based on the VGA display module, for your reference)

上变频

pc与fpga之间通过千兆以太网交换机实现网络通信(Network communication between PC and FPGA via Gigabit Ethernet switch)

基于FPGA的图像算法实现，包含了matlab的算法验证，利用xilinx的开发环境在FPGA上实现了算法，最终通过了验证。

FPGA流水线设计的资料，可以作为学习FPGA开发并行操作的一个经典教材，具有很好的指导作用。(FPGA pipeline design information can be developed as a learning FPGA parallel operation of a classic textbook, has a good guide.)

Very suitable for the study using computer vision, Analysis of the signal time domain, frequency domain, cepstrum, cyclic spectrum, etc. The performance of the program has reached a high level.

说明：  FPGA 点亮数码管的灯，本例程支持6位数码管，因为我的FPGA开发板是这样子的(The lamp of digital tube illuminated by FPGA)

精简指令集的整体设计 实现了简单的8位RISC CPU的基础功能，包括加，减，与，或，异或等操作，还可以对RAM进行读取或写入操作。另外，还有RISC_CPU的实验报告，里面包含了RISC-CPU的设计原理及仿真结果。

说明：  RLC Test程序,一个电子竞赛的题目。里面有详尽的源代码。(RLC Test procedures, an electronic race issue. There are detailed source code.)

使用DDR3IP核进行仿真，写入读取数据(Using DDR3IP core to simulate, write and read data)