16快速乘法器的VHDL

使用vhdl语言设计一位全加器，在仪器上下载并实现LED灯的闪亮(A full adder design)

vhdl编写的硬件乘法器-prepared by the VHDL hardware multiplier

基于FPGA的AD转换控制器设计，AD7822，quartus II，verilog hdl(A Design of the A/D Convertion Control Module Based on FPGA)

Simple I2C controller -- 1) No multimaster -- 2) No slave mode -- 3) No fifo s -- -- notes: -- Every command is acknowledged. Do not set a new command before previous is acknowledged. -- Dout is available 1 clock cycle later as cmd_ack -Simple I2C controller-- 1) No multimaster-- 2) No slave mode-- 3) No fifo"s---- notes :-- Every command is acknowledged. Do not set a ne w command before previous is acknowledged.-- D is available out a clock cycle later as cmd_ack

ODBC编程实例，使用ODBC对基于开关量数据采集卡的通信接口设计与实现。(ODBC programming examples, using ODBC for data acquisition card based digital communications interface design and implementation.)

电子闹钟：基于fpga的电子闹钟设计，采用模块化方式-Electronic alarm: FPGA-based electronic alarm clock design, modular approach

32位二进制除法器2

16位元浮点数CPU,可作运算,以VHDL编写-16-bit floating point CPU, can be used for computing in order to prepare VHDL

VHDL子程序集,包括各种例程资料以及源码.-VHDL subprogram, including a variety of routine information as well as the source.

MTK平台硬件培训MTK平台硬件培训MTK平台 GSM双频手机接收信号 处理流程MTK平台 GSM双频手机接收信号 处理流程 (MTK platform hardware training platform hardware training MTK MTK GSM dual-band mobile phone platform to receive the signal processing)