vhdl classical source code

是vhdl语言，在fpga开发板上实现十进制技术（7段数码管显示），包括复位，清零，计数使能。-Is the VHDL language, in the FPGA development board realize decimal technology (7 digital tube display), including reset, cleared, counting enable.

FAST HADAMARD TRANSFORM VERILOG FOR IMAGE PROCESSING

说明：  现在最流行的RTL设计方法之一，本书为全球流行的设计入门书籍(One of the most popular RTL design methods nowadays, this book is an introductory book for popular design all over the world.)

TCD1209D驱动程序 Verilog语言(TCD1209D driver Verilog language)

ALTERA NIOS处理器，VHDL语言在QUARTUS编译通过，然后有C语言在NIOS SHELL下驱动，实验音频解码-Altera NIOS processor, the QUARTUS VHDL compiler, then the C language under NIOS SHELL-driven, experimental audio decoder

VHDL语言教材-The teaching material of VHDL Language

基于FPGA的i2s接口输入模块设计，其中有原理图和verilog源码，可在Quartus环境下进行仿真(FPGA-based i2s interface input module design, including schematics and verilog source code, can be simulated in Quartus environment)

用VIVADO软件编写的，实现以太网芯片88E1510中的mdio控制模块代码，并且含有VIO仿真文件(Written in VIVADO software, the realization of the Ethernet chip 88 e1510 mdio control module of code, and contains the VIO simulation file)

This code that genetes a square, sawtooth and a triangular waveform. It is useful for designing a function generator in VHDL.

上海交通大学电子信息与电气工程学院VHDL经典教程-Shanghai Jiaotong University Electronic Information and Electrical Engineering, Institute of Classical VHDL Tutorial