08EE06EDA 实验 4（VHDL 状态机设计_序列检测器）6/7/2008

it performs the serail dividing operations

4x4键盘模块。这个文件包括普通的键盘设计方案说明和相关的原程序。-4x4 keyboard module. The documents include ordinary keyboard design program descriptions and procedures related to the original.

收集的QuartusII的使用手册，包含了几个pdf文件，比较不错的参考手册-Collected QuartusII s manual contains a number of pdf files, compare a good reference manual

正弦信号发生器，用VHDL来完成，抗干扰能力较强，(Sinusoidal signal generator, using VHDL to accomplish, a strong anti-interference ability,)

使用synopsys的基本步骤，综合工具的使用说明，有用的好东西-Synopsys using the basic steps to use the integrated tools, useful good things

这也是VHDL语言编写的一个小程序，对于VHDL入门很有帮助~~(This is a small program VHDL language, VHDL entry-helpful ~ ~)

说明：  RS(255,247)编码解码器Verilog源代码(Verilog source code of RS (255247) codec)

说明：  100个vhdl例子，对初学者很有用，可以用MAX+PLUS 2来编译仿真的(100 vhdl example, useful for beginners, you can use the MAX+ PLUS 2 to compile the simulation)

数字时钟，包括流程图以及编码和完整的实验报告，内容详细丰富。(Digital clock, including flowcharts, and coding and a full lab report, detailed and rich.)

cpld下在线资料ByteBlaster-CPLD under the online information ByteBlaster