Verilog HDL语言编写的5分频电路。采用两路时钟相逻辑作用产生。...

电路酒窖杂志的vhdl示例。vga控制器、视频发生器等PS2鼠标vhdl

sin波形发生图形，应用智能老师款到即发了快速打击 (sin waveform generation graphics application smart teacher paragraph to that made a rapid strike)

4 bit ROM for Quartus

this the program which can help to convert bcd code to excess3 code,the perfect circuitary has been given in this document which will lead you to understand it more properly.Reference is taken from morris mano book of digital electronics.This program can work on quatrus without any trouble.this is also used to make a final year -this is the program which can help to convert bcd code to excess3 code,the perfect circuitary has been given in this document which will lead you to understand it more properly.Reference is taken from morris mano book of digital electronics.This program can work on quatrus without any trouble.this is also used to make a final year

Matlab - to hdl code for square root

this is the vhdl code for the arithmetic logic unit.enjoy!

以太网的vhdl和verilog代码，供大家学习-Ethernet VHDL and Verilog code for everyone to learn

数字钟(Digital clock)

AHB master monitor for verification

verilog编写的QPSK发射机的ＦＰＧＡ部分，已经过验证，完全达到要求。调制矢量误差４％(QPSK transmitter verilog prepared by the FPGA portion, has been proven, fully meet the requirements. Modulation vector error of 4 )