这是一个代码为华勒斯树乘法器

用Verilog代码实现的乒乓操作，用Verilog代码实现的乒乓操作(Verilog pingpong)

应用背景FPGA原型的VHDL例子提供一系列清晰，易于遵循的快速代码开发模板；大量的实际例子来说明和强化的概念和设计技术；现实可实施的项目和测试在Xilinx原型板；深入探索和Xilinx PicoBlaze软核微处理器。关键技术本书采用“做中学”介绍VHDL和FPGA技术的概念和设计人员通过一系列的实验方法。

按键控制led灯亮灭顺序，从左到右跑或者从右往左跑(Press button to control the LED lights on and off)

一个8位的CPU设计，用verilog语言写的，希望有用(A CPU OF 8 BITS )

自己编写的，浮点数与整数之间的转换的Verilog HDL实现(Written by myself, it is converted into Verilog HDL integer floating point implementation)

数字系统设计的入门书，教你如何学会用verilog语言实现各种数字逻辑功能，例程经典易懂(xiawenyu verilog)

DDR（双速率）SDRAM控制器参考设计，xilinx提供-DDR (double data rate) SDRAM controller reference design for Xilinx

verilog编写的RTC（实时时钟）包含APB总线接口、时钟计时部分等(verilog prepared by the RTC (real time clock) contains APB bus interface, clock time some other)

全自动洗衣机的控制器。 1.洗衣机的工作步骤为洗衣、漂洗和脱水三个过程，工作时间分别为：洗涤10秒，漂洗5秒，脱水5秒； 2.用一个按键实现洗衣程序的手动选择：A、单洗涤；B、单漂洗；C、单脱水；D、漂洗和脱水；E、洗涤、漂洗和脱水全过程； 3.用显示器件显示洗衣机的工作状态（洗衣、漂洗和脱水），并倒计时显示每个状态的工作时间，全部过程结束后，应提示使用者； 4.用一个按键实现暂停洗衣和继续洗衣的控制，暂停后继续洗衣应回到暂停之前保留的状态； (Automatic washing machine controller. 1 washing machine work steps for the laundry, rinsing and dehydration three processes, working hours are as follows: washed for 10 seconds, rinse for 5 seconds, dehydrated five seconds 2 with a button to manually select the program to achieve laundry: A, single-washing B, single rinse C, a single dehydration D, rinsing and dehydration E, washing, rinsing and dehydration the whole process 3 with a display device display the working status of washing machine (laundry, rinsing and dehydration), and each state countdown show working hours, after the whole process should prompt the user 4 laundry with a button to pause and continue control of laundry, laundry should be back after a pause pause before continuing to retain the state )

键盘输入串口输出显示字符,通过串口显示键盘输入的字符-Keyboard input serial output display characters, the keyboard input through serial display characters