PID控制规律及控制器实现

基于fpga与verilog语言的的sdram读写(SDRAM reading and writing based on FPGA and Verilog language)

16次迭代的CORDIC算法，精度很高，可应用于计算反正切值(16 iterations of the CORDIC algorithm, high accuracy, can be applied to calculate arctangent)

《CPLDFPGA嵌入式应用开发技术白金手册》源代码，涉及FPGA/CPLD的各个方面，键盘扫描，LED扫描等简单程序及滤波器等的设计(" CPLDFPGA platinum embedded application development technology handbook" source code, related to FPGA/CPLD all aspects of the keyboard scanning, LED scanning filters, such as simple procedures and design)

说明：  ertyguhijop[lkjhvbn hiouopi][[poiuy

说明：  从github下载的，能够参考设计AXI4的协议接口(AXI4 Verilog template)

具备GMII接口和ARP协议功能的千兆以太网控制器，经过Xilinx SPATAN-III FPGA验证

异步的fifo,写时钟和读时钟相互独立，能够对数据进行缓存处理。希望对大家有用(Asynchronous fifo, write clock and the read clock independent of each other, capable of processing the data cache. I hope useful)

FPGA入门系列实验教程——实验四.LED跑马灯(Getting Started with FPGA tutorial series of experiments- Experiment IV. LED Marquee)

利用DE2115开发板进行串口通信，完成串口的发送，将板子上的滑动按键的状态通过串口传至上位机，并且在LED上显示。

说明：  使用Verilog 编程语言实现对11 bit 编码器SSI输出的读取(Use Verilog to read encoder,it's 11 bit and SSI output)