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08EE06EDA 实验 4(VHDL 状态机设计_序列检测器)6/7/2008
08EE06EDA 实验 4(VHDL 状态机设计_序列检测器)6/7/2008-design thesis requirement by vhdl
- 2022-03-29 09:41:25下载
- 积分:1
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msp430x41x
低电源电压范围为1.8 V至3.6 V
超低功耗:
- 主动模式:280μA,在1 MHz,2.2伏
- 待机模式:1.1μA
- 关闭模式(RAM保持):0.1μA
五省电模式
欠待机模式唤醒
超过6微秒
16位RISC架构,
125 ns指令周期时间
12位A/ D转换器具有内部
参考,采样和保持,并
AutoScan功能
16位Timer_B随着三† 或七‡
捕捉/比较随着阴影寄存器
具有三个16位定时器A
捕捉/比较寄存器
片上比较器
串行通信接口(USART),
选择异步UART或
同步SPI软件:
- 两个USART(USART0 USART1)的†
- 一个USART(USART0)‡
掉电检测
电源电压监控器/监视器
可编程电平检测
串行板载编程,
无需外部编程电压
安全可编程代码保护
融合(Low Supply-Voltage Range, 1.8 V to 3.6 V
Ultralow-Power Consumption:
− Active Mode: 280 µ A at 1 MHz, 2.2 V
− Standby Mode: 1.1 µ A
− Off Mode (RAM Retention): 0.1 µ A
Five Power Saving Modes
Wake-Up From Standby Mode in Less
Than 6 µ s
16-Bit RISC Architecture,
125-ns Instruction Cycle Time
12-Bit A/D Converter With Internal
Reference, Sample-and-Hold and
Autoscan Feature
16-Bit Timer_B With Three† or Seven‡
Capture/Compare-With-Shadow Registers
16-Bit Timer_A With Three
Capture/Compare Registers
On-Chip Comparator
Serial Communication Interface (USART),
Select Asynchronous UART or
Synchronous SPI by Software:
− Two USARTs (USART0, USART1)†
− One USART (USART0)‡
Brownout Detector
Supply Voltage Supervisor/Monitor With
Programmable Level Detection
Serial Onboard Programming,
No External Programming Voltage Needed
Programmable Code Protection by Security
Fuse)
- 2012-05-31 15:26:33下载
- 积分:1
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audio_verilog
AUDIO音频模块AN831的录音及播放FPGA代码,测试通过(AUDIO audio module AN831 recording and playback of FPGA code, the test passed)
- 2020-09-12 09:27:58下载
- 积分:1
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bldc_motor_control_design_example
无刷直流电机 VHDL VERILOG 控制,速度环,RS232 串口接收发送 始终分频 PWM生成 电机相序 actel FPGA使用-VERILOG BLDC control of the use of actel FPGA( actel VERILOG BLDC control of the use of actel FPGA)
- 2020-10-29 09:19:57下载
- 积分:1
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移位寄存器。verilog VHDL
shift register. vhdl verilog
- 2023-06-29 10:50:03下载
- 积分:1
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BCD
BCD码减法实现程序,非常完整,采用Verilog HDL语言实现。(BCD subtraction to achieve program code, very complete, using Verilog HDL language.)
- 2010-08-04 16:43:26下载
- 积分:1
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fpga_pc_software
计算机组成原理课程实验使用软件,Thinpad教学机教学实验软件
实现mips代码到机器代码之间的转换
实现本机和FPGA板的通信,将机器代码送入
可在本机编写代码送入fpga板的sram中,fpga板的cpu会运行(Computer architecture course experiment using software, Thinpad teaching machine teaching experiment software mips code into machine code conversion for communication between the machine and the FPGA board can be fed into the machine code written in native code into the fpga board sram in, fpga board cpu runs)
- 2014-06-15 18:10:11下载
- 积分:1
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6713emiftofpgatopci,这个是完整的一套从6713的emif到fpga的双口ram,然后主机通过9054到双口ram,交换数据完成
6713emiftofpgatopci,这个是完整的一套从6713的emif到fpga的双口ram,然后主机通过9054到双口ram,交换数据完成-6713emiftofpgatopci, this is a complete set of the EMIF from 6713 to the FPGA
- 2022-01-25 23:08:47下载
- 积分:1
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Verilog
这是个关于verilog入门的文档,有同志对verilog感兴趣,可以下载此文档,以供参考。(This is a verilog entry on the document, there are comrades of the verilog interested, you can download this document for reference.)
- 2011-11-06 13:18:07下载
- 积分:1
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PWM
说明: 脉冲宽度调制,VHDL代码编写,包括QUARTUSII和MODELSIM工程以及testbench(Pulse width modulation, VHDL coding, including QUARTUSII and ModelSim engineering and Testbench)
- 2020-11-26 09:49:31下载
- 积分:1