Verilog的书verilog_2001_ref_guide

硬件设计VHDL学习100例(站长推荐)-VHDL hardware design study of 100 cases (chief recommended)

sram 6bit仿真模型，verilog编写(sram 6bit simulation model, verilog prepared)

说明：  按键消抖,避免按键抖动造成信号误触发，增大按键输入的可靠性(Key jitter elimination, avoid key jitter caused by signal error trigger, increase the reliability of key input)

有用的数字钟设计文档，有秒表、闹钟等模块，希望对大家有用！(JUST LEARN FROM IT!!ENJOY!)

实用Verilog编写的SVPWM程序，产生出SVPWM波形，可用于实现同步电机或者异步电机的空间矢量控制算法。(Practical Verilog of SVPWM written procedures, resulting in the SVPWM waveform can be used to implement the space vector control algorithm of the synchronous motor or induction motor.)

这是自适应滤波器，使用verilog代码来编写的，已通过了仿真，效果很好。希望能给大家好好分享！(This adaptive filter verilog code to write, through a simulation, with good results. I hope to give a good share!)

偶数分频，包括验证程序，verilog实现，可综合-Even-numbered sub-frequency, including the verification process, verilog realize, can be integrated

UART program for fun(UART)

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY ladder IS PORT(clk,reset:IN STD_LOGIC;

使用vhdl实现的1024点的FFT算法-Using vhdl implementation of the 1024-point FFT algorithm