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利 用 来 vhdl 设 计 p cm的 实 现
利 用 来 vhdl 设 计 p cm的 实 现-Vhdl design used for the realization of p cm
- 2023-06-01 20:05:03下载
- 积分:1
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XDS100v3-Design-Kit-1.0-Setup
压缩包是ti xds100v3 Design kit的安装文件,安装后有原理图、PCB文件,与DSP接口采用FPGA,安装后有源码,是VHDL格式的,支持开源,降低开发成本(Compression package is ti xds100v3 Design kit installation file after installation schematics, PCB files, and DSP interface with FPGA, after installation source is VHDL formats, support for open source, reduce development costs)
- 2014-08-28 09:36:34下载
- 积分:1
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mypro_synfifo
基于IP核RAM的同步fifo设计,工程使用Xilinx的开发软件ISE(RAM-based synchronization fifo IP core design, engineering, software development using Xilinx ISE)
- 2020-09-22 01:27:56下载
- 积分:1
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A " percentage of seconds, seconds, minutes," digital stopwatch timer c...
一个具有“百分秒,秒,分”计时功能的数字跑表,可以实现一个小时以内的精确至百分之一秒的计时。
数字跑表的显示读者可以通过编写数码管显示程序来实现,本训练只给出数字跑表的实现过程。
读者还可以通过增加小时的计时功能,实现完整的跑表功能。-A " percentage of seconds, seconds, minutes," digital stopwatch timer can be achieved within an hour of precision to the hundredth of a second time. Digital stopwatch readers can display the digital display through the preparation of procedures to achieve, given the training is only the realization of the process of digital stopwatch. Readers can also function to increase hours of time to achieve full stopwatch function.
- 2022-05-05 18:35:57下载
- 积分:1
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verilog 写的 多功能数字钟
verilog 写的 多功能数字钟-verilog to write multi-functional digital clock
- 2023-03-18 14:30:04下载
- 积分:1
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FPGA-IMPLEMENTATIONS-OF-THE-DES
FPGA based design and Implementation of Advanced Encryption Standard
- 2015-07-20 23:33:11下载
- 积分:1
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telephone-cost-metering
该程序用来实现电话计时以算取费用,比较简单(telephone cost metering verilog code)
- 2013-11-03 19:45:00下载
- 积分:1
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21ic下载_16QAM调制解调器设计与FPGA实现
基于FPGA的16QAM调制器设计与实现(Design and implementation of 16QAM modulator based on FPGA)
- 2018-06-14 21:57:50下载
- 积分:1
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DDS_signal_genarator
这是一个利用verilog语言编写的信号发生器的例子,值得参考(this is a code about signal generator by VIERILOG LANGUAGE!)
- 2013-12-23 10:12:52下载
- 积分:1
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Xilinx
说明: 2020 XILINX Vivado ISE IP License最全最可靠License获取方式。
LDPC,
CPRI,
Turbo,
Polar,
JESD204B/C
HDMI1.4/2.0,
MIPI CSI-2,
MIPI DSI
AXI CAN
AXI USB2.0
SD Card Host
Reed-Solomon Decoder/Encoder
10G Enthernet MAC
25G Enthernet MAC
40G Enthernet MAC
50G Enthernet MAC
100G Enthernet MAC
RS Encoder/Decoder
Display Port/ DP
Video Test Pattern Generator
RapidIO
tri mode ethernet mac(LDPC,
CPRI,
Turbo,
Polar,
JESD204B/C
HDMI1.4/2.0,
MIPI CSI-2,
MIPI DSI
AXI CAN
AXI USB2.0
SD Card Host
Reed-Solomon Decoder/Encoder
10G Enthernet MAC
25G Enthernet MAC
40G Enthernet MAC
50G Enthernet MAC
100G Enthernet MAC
RS Encoder/Decoder
Display Port/ DP
Video Test Pattern Generator
RapidIO
tri mode ethernet mac)
- 2020-03-11 15:40:45下载
- 积分:1