VHDL语言串口接收数据

VHDL_APPOINTMENT TIME(Hẹn thời gian hiển thị LCD sử dụng ngôn ngữ VHDL)

Vhdl实现的鼠标协议历程，代码可读性高，适合作为案例参考。-VHDL realize the course of the mouse protocol, code readable, suitable as a reference case.

FPGA开发仿真工具modelsim的高级进阶教程，包括如何写脚本文件和后台批处理文件(FPGA Development Advanced simulation tools modelsim tutorial, including how to write a script file and back-office batch file)

GAL16V8反汇编源程序JED2ABEL.C 把jec汇编成abel文件-GAL16V8 disassemble source JED2ABEL.C the JEC document compiled abel

说明：  FPGA与PC端实现串口数据的收发，先从PC端接收数据，然后发回给电脑，可通过串口助手验证。(The serial port data is sent and received between the FPGA and the PC. First, the data is received from the PC, and then sent back to the computer. It can be verified by the serial port assistant.)

基于LabVIEW FPGA的频谱估计与分析(the power spectrum estimation and analysis based on LabVIEW FPGA)

通信基带信号发生器的设计，采用单片机输入频率和波形，在FPGA中实现频率和波形生成-Communications base-band signal generator design, the use of single-chip input frequency and waveform, in the FPGA to achieve the frequency and waveform generation

用VHDL写的交通灯控制源码，原创，希望对大家有所帮助-Use VHDL to write a traffic signal-controlled source, originality, and they hope to help everyone

wishbone接口的设计，在交换机和MAC之间建立wishbone接口(the wishbone interface design, wishbone interface between the switch and MAC)

资源描述该程序可以读写FAT32文件系统的SD卡。SD卡的接口现在采用IO模拟接口方式。在板子SD卡座上插上FAT32格式的SD卡，请连接下载线的JTAG接口到板子，下载fpga的SOF文件，再下载NIOSII IDE中的文件。