基于VHDL开发的自动售货机系统，可实现自动售货过程中的基本功能，具有一定的代表性。...

FIR滤波器：自定滤波器的类型（低通，高通或带通）、设计指标（通带截止频率、通带波纹、阻带截止频率、阻带衰减） 1、根据指标选择合适的窗函数，用窗口设计法设计符合指标的FIR滤波器；并验证其性能是否满足预定指标。 (FIR filters: Custom filter types (low pass, high pass or band-pass), design specifications (passband cutoff frequency, passband ripple, stopband cutoff frequency, stopband attenuation) 1, according to indicators choose the right window function, using the window design method of FIR filter designed to meet the targets and verify that its performance meets the set targets.)

verilog 的东西好好用的呢，那是verilog 学习者的必备东西哦(verilog things properly used it, it is an essential learners verilog things oh)

verilog实现的基带信号编码，整个系统分为六个模块，分别为：时钟模块,待发射模块,卷积模块,扩频模块,极性变换和内插模块,成型滤波器(verilog implementation baseband signal coding, the entire system is divided into six modules, namely: the clock module, to be launched modules, convolution module, spread spectrum modules, polarity transform and interpolation modules, forming filter)

以太网总线源代码，里面有详细的文档说明，已经过FPGA验证。-Ethernet bus source code, which has a detailed document that has been FPGA verification.

VHDL语言实现摄像头的捕捉和采集,通过仿真验证，很好哈-vidicon s catch and collection in VHDL

能够实现16位的SDRAM的读写，没有仿真文件，只有SDRAM读写的源代码，用Verilog编写(can complete read or write sdram， only include Verilog code and no simulation files)

一些例子程序需要的话可以下来看看新手推荐-Some examples of procedures can be down if necessary to see novice Recommended

RS 编码和解码Verilog Code, 实现了RS（544,514)的编码和译码；(-RS Coding and Decoding Verilog code，　implement RS（544,514))

用verilog在FPGA内部实现8051内核，超好、超难找的资料！共享出来！(Verilog FPGA internal 8051 core, super, super hard to find! Shared out!)

FPGA开发板上写的Verilog代码： 功能是从电脑端发送一个字节，然后把它接收回来。 -FPGA development board to write the Verilog code: function is from the client computer sends a byte, and then receive it back.