A complete viterbi coding procedures, the use of VHDL language, as well as test...

基于nios的vga显示实验，自制的ip核。可以按照自己的需求改写ip(Nios to vga display ip nuclear experiments, homemade. Can be rewritten in accordance with their own needs ip)

超前进位加法器得VHDL实现小点资料代码(CLA was a small point of information VHDL code)

本程序是用verilog 编写的模块，用来在lcd1602上显示用tlc549采样的电压值(This program is written in verilog module, used in lcd1602 display with tlc549 sampled voltage value)

Leonardo综合器用STDL80 0.5um综合库，安装见说明，找到它真不容易。(STDL80 0.5um ASIC Library for Leonardo)

r80515源代码，包含说明文档。FPGA验证通过(r80515 source code, including documentation. Verified by FPGA)

SMbus通讯协议的Verilog程序段，已通过Moldesim的仿真，可用(Verilog program segment of the SMbus communication protocol, has been through the Moldesim simulation, the available)

文利用直接数字频率合成器(DDS)与CPLD技术和单片机控制技术，研制和 设计了高分辨率、高稳定度的函数信号发生(Wen using direct digital frequency synthesizer (DDS) and CPLD technology and single-chip microcomputer control technology, development and Design of high resolution, high stability function of the signal )

VHDL-2008 Just the New Stuff Peter J. Ashenden Consultant Ashenden Designs

fpga测温的框图和源码 希望能帮到大家 没有测试 紧供参考-fpga vhdl

基于VHDL的I2C程序0003,很不错的论文及程序，，大家快下啊-based on the I2C procedures VHDL 0003, a very good paper and procedures, we quickly under ah