实现spi接口的传输，并多外接EEPROM读写数据

用FPGA实现数字锁相环，开发环境为ISE-Using FPGA digital phase-locked loop, development environment for ISE

给予QPSK调制的OFDM例程，简单明了的表述了OFDM的通信原理(Given OFDM QPSK modulation routine, simple expressions of OFDM communication theory)

说明：  基于数码管独立显示和三色灯的交通指示系统设计(Design of Traffic Indicator System Based on Digital Tube Independent Display and Tri-color Lamp)

这是用verilog语言实现的1024点ff程序t-This is achieved using Verilog 1024 language ff procedures point t

UART串口的verilog源代码，完全正确...........(UART serial Verilog source code, completely correct ...........)

模拟地铁自动售票机选票、付款、取票、找零等功能，包含软件仿真和硬件响应，可供仿真测试和FPGA验证。(Analog subway ticket vending machine ballots, payment, tickets, give change and other features, including software simulation and hardware response for simulation and FPGA verification test.)

Multipleksor 3 to 1 - 3x1bit in, 1x1bit out

自己写得一个关于sine（32X24）的程序-own written on a sine (32X24) procedures

这是一个时钟的VHDL的源程序，里面包含有源程序，还有工程文件对大家很有帮助-This is a clock VHDL source code, which contains the source code, as well as engineering documents helpful to everyone

基于FPGA的视频图像加密系统 DE2_70+TRDB—D5M+VGA(FPGA-based video encryption system DE2_70+TRDB-D5M+VGA)