The source code for the Nios II development of an example, the main demonstratio...

实现fpga上交通灯的设计，可以在开发板上实现红绿灯(Design of traffic lights on FPGA)

USB 1.1 PHY的代码，verilog语言 USB 1.1 PHY的代码，verilog语言-USB 1.1 PHY code, verilog language USB 1.1 PHY code, verilog language

移位相加硬件乘法器,基于FPGA的VHDL语言编写的,含有全部文件-displacement add hardware multiplier, based on FPGA VHDL prepared, containing all the documents

用Verilog实现的 哈佛结构的简单指令集CPU程序，由ALU、地址译码器、指令译码器等部分组成(Part of a simple instruction Verilog realize the Harvard architecture CPU program set by the ALU, address decoder, an instruction decoder, etc.)

fpga串口的发送程序基于verilog语言拿走不用谢。(The sending program of FPGA serial port is based on Verilog language.)

多人抢答器 源代码 实用 课程设计 用用VHDL语言-The source code for more than Responder practical courses designed for use with the VHDL language

自动售货机，根据所要的东西，自动收费，并进行找零(Vending machine, according to what you want to automatically charge and conduct Keep the change)

学习FPGA的资料，基于FPGA的卡尔曼滤波器的设计与实现(Learning FPGA information, FPGA-based Design and Implementation of Kalman Filter)

用VHDL语言实现了DES加密算法，其中包含了测试程序，能够进行仿真。(Using VHDL language implementation of the DES encryption algorithm, which contains the test procedures can be simulated.)

有符号16位乘法器。经典booth编码。拓扑结构为wallance树。加法器类型是进位选择加法器。(Number system: 2 s complement Multiplicand length: 16 Multiplier length: 16 Partial product generation: PPG with Radix-4 modified Booth recoding Partial product accumulation: Wallace tree Final stage addition: Carry select adder )