通过VHDL语言的例子，对FPGA的VHDL语言的原型（第六章）是

Great guide for writing VHDL

FFT 8 PT RDX 2 USING VERILOG

说明：  基于FPGA的游戏实例，开发板为Xilinx的basys3，VGA显示(Basys3, VGA Display of Xilinx Development Board Based on Game Example of FPGA)

用verilog实现sobel边缘检测算法(sobel edge detection with verilog language)

实现mimo-ofdm系统的交织功能，可供参考(Implement the mixed function of mimo- ofdm system, available for reference)

用VHDL语言仿真音乐设计 用VHDL语言仿真音乐设计-Simulation using VHDL language music design music design simulation VHDL language

verilog code for bus controller

说明：  实现数字频率合成实验，加载数据ram,形成波形(The experiment of digital frequency synthesis is realized, and the data RAM is loaded to form the waveform)

此代码是SPI接口的Master的Verilog源代码，经上板测试是没有问题的，请大家放心使用 (This code SPI Interface Master of Verilog source code, there is no problem on board test, please rest assured to use)

Design HDL code for a circuit that calculates the Hamming distance of two 8-bit inputs.