可编程逻辑设计快速入门指南从西林有限

FPGA UART transmit and so on

本压缩包，包换一个用verilog语言实现的huffman编码源程序，同时给出了众多论文和基础知识的文档资料，一应俱全。(The compression package, shifting one using huffman coding verilog language source code, and gives basic knowledge of many papers and documentation, everything.)

3-8译码器实验，用三个拨码开关控制8个LED中某一个点亮

MP3解码的ASIC全部过程，包换含c和vhdl代码，样例。(MP3 decoding ASIC whole process, shifting with c and vhdl code, sample.)

很好的quartus软件仿真教程，flash版。-Good quartus software simulation tutorials, flash version.

低通滤波器在QUARTUS7.0开发环境下的文本与框图结合的实现方法的源代码-Low-pass filter QUARTUS7.0 development environment in the text and diagram combination of methods to achieve source code

实现自然对数运算的cordic算法的matlab浮点仿真，以及针对FPGA硬件平台的定点仿真测试(Achieve natural logarithm of cordic algorithm matlab floating point emulation, and FPGA hardware platform for fixed-point simulation testing)

可YCrCb2RGB集成模块（Verilog）采用三行，它们简单的做分数运算，有流水线技术

本文件介绍的是用VerilogHDL语言设计分频器和32位计数器.(This paper presents the design using Verilog HDL language Frequency Divider and 32 counters.)

VHDL cyclic redundancy check generator und receiver