VHDL语言按VGA接口标准把数字图像信号转换成标准VGA格式。适合做学习试验...

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8位十进制频率计,通过验证,目标芯片EPF10KLC84-4-8 decimal Cymometer through authentication, the target chip EPF10KLC84-4

辛辛苦苦的作品应用于DE2 的 开发。。希望对大家有用。-hard work for Dictyophora development. . We hope that the right useful.

说明：  verilog编码器、计数器、加法器的程序(Verilog encoder, counter, adder procedures)

它是一个基于verilog的数字时钟，显示时-分-秒，它可以手动输入，并为时、分和秒分配3个开关第二，它数字时钟频率是实时设置的。我自己用逻辑开发的。。。

当年本科时的毕业设计，信号发生器和频率计-The time of the year undergraduate graduate design, signal generator and frequency counter

ADC TLC5510的测试程序，经过测试通过，十分简单好用-ADC TLC5510 test procedures, after the test is very simple and easy

Lift Controller in vhdl using process statement and state disgram

基于DVI协议动态全彩LED大屏幕发送卡设计与实现,成本比较低,效果很好,可以实现高清视频(Dynamic full-color LED large screen based on the DVI protocol send a card design and relatively low cost, good effect, and can achieve high-definition video)

Verilog 编写的网卡DM9000A的IP核，altera公司寄的DE2系统中的源程序核-Verilog prepared DM9000A the IP core network card, altera company sent DE2 System source of nuclear