非常多的verilog实例，对于刚入门者比较有用

在xilinx的ml507板子上用的ICAP功能 配置存储器 这里边包含了控制程序 以及配置ICAP寄存器的程序 就是完整的通过串口控制FPGA多重配置的程序 用verilog实现的(how to configure the ICAP)

vhdl source code for 8 bit datapath logic

北斗定位系统卫星下行信号的基带处理部分——基于FPGA的的直接序列扩频发射机的设计与仿真。，已通过测试。 (Beidou positioning system satellite downlink signal baseband part- based on the design and simulation of the FPGA direct sequence spread spectrum transmitter. , Has been tested.)

TCM解码，VHDL代码，是我在工作中做的工程代码，时序稳定，里面有syn以及软判决的算法，经典-TCM decoder, VHDL code, yes, I do work in the project code, timing stability, There are syn and soft-decision algorithm, classic!

1、FSMC全称是静态存储控制器，用来高速操作外部SRAM，NOR，NAND等，广泛用来驱动LCD MCU的FSMC配置在fsmc_nor.c，你也可以查阅相关资料。 2、此例程通过读写外部M29W128，熟悉FSMC的配置以及操作。(1, FSMC stands for static memory controller for high-speed operation of external SRAM, NOR, NAND, widely used to drive the LCD MCU FSMC configuration in fsmc_nor.c, you can also access to relevant information. This routine by reading and writing external M29W128 familiar with the configuration and the operation of the FSMC.)

用FPGA分频，做一个有时分秒的时钟，并用数码管显示(FPGA divide a sometimes every minute clock, and digital display)

这里是apb总线设计代码。这个源程序是基于verilog语言设计的(Here is the APB bus design code. This source program is designed based on Verilog language)

maxplus2为开发环境 vhdl编写的 键盘 程序-maxplus2 VHDL development environment for the preparation of the keyboard procedures

Bucknell Verilog Manual

encoding and decoding of audio signal