这是一个LCD驱动的VHDL代码

vhdl code for decoder and detemines the basic mechanism of gates of decoder

用状态机对A/D转换器0809的采样控制电路的实现。工具：Quartus ii 6.0 语言：VHDL-State machine used for A/D converter sampling control circuit 0809 is achieved. Tools: Quartus ii 6.0 Language: VHDL

FPGA上使用硬件描述语言实现俄罗斯方块游戏，该游戏支持PS2键盘输入，VGA视频输出，游戏可以选择不同的难度，同时可以记录显示游戏得分，同时包含VC上位机方块形状编辑器的一整套项目方案

数字频率计 数字频率计-Digital frequency meter digital frequency meter

16 bit switch input view in hexa format on 7seg display

FPGA按键延时模块，产生key_value和key_flag 可直接例化调用(The key delay module of FPGA)

CPLD LATTICE1032测试模式代码-CPLD LATTICE1032 test model code

at070tn83 800x480 tft lcd verilog 測試 quartus 文件 (800x480 tft lcd at070tn83 testing project file)

ADC TLC5510的测试程序，经过测试通过，十分简单好用-ADC TLC5510 test procedures, after the test is very simple and easy

用verilog语言写的串口通信程序,包括收发两个模块,可用于FPGA的通信中,可通过程序设置收发的位数,有很好的扩展性.-Verilog language used to write serial communication program, including the sending and receiving two modules can be used for FPGA communications, you can send and receive through the program to set the number of bits, there is a very good scalability.