vhdl语言实现的频率发生器，可以产生不同的频率

verilog实现的串口实现代码，可以直接复制使用(verilog achieve serial implementation code can be copied directly use)

de2 70 开发板的演示程序，verilog语言编写，视频输入输出(de2 70 development board demo program, verilog language written, video input and output)

这是一个用VHDL语言编写的并口转串口程序，在altera开发系统下验证通过，运用于开发板与计算机之间的通信，源程序可以提供参考-This is a use of the VHDL language Parallel to Serial procedures, In altera development system under test passed, the development of applied between the panels and computer communications, can provide a reference source

多年项目经验测试文档测试文档，重要保存重要保存重要保存重要保存重要保存重要保存(Years of project experience testing document testing, it is important to save save save important important important important to save save save important)

说明：  数字示波器实验，利用AD、DA和VGA三个外设来实现简易示波器，DA外设发送正弦波给AD外设，AD外设解析成数字信号将数据送给VGA外设进行显示。在VGA上可以看到DA外设发送的波形、波形频率和波形峰峰值。(In the experiment of digital oscilloscope, AD, DA and VGA are used to realize simple oscilloscope. DA peripheral transmits sine wave to AD peripheral. AD peripheral resolves into digital signal and sends data to VGA peripheral for display. The waveform, waveform frequency and peak value of DA peripheral can be seen on VGA.)

ethernet mac core.this is the etherenet udp application

DDS在现在运用月来越广泛，在相对带宽、频率转换时间、相位连续性、正交输出、高分辨力以及集成化等方面都远远超过了传统频率合成技术所能达到的水平，为系统提供了优于模拟信号源的性能。利用DDS技术可以很方便地实现多种信号。在FPGA上实现的DDS-DDS now to the use of more extensive relative bandwidth, frequency conversion time, phase continuity, quadrature output, high-resolution and integration, and other aspects far more than the traditional frequency synthesizer technology can achieve the level To provide a superior analog signal source performance. DDS technology can be used very easily to a variety of signal. FPGA Implementation of DDS

Verilog_HDL源码 -Verilog_HDL source Verilog_HD L FOSS Verilog_HDL FO

用Vrilog产生一个混沌信号，并用MATLAB仿真，画出波形。(With Vrilog generate a chaotic signal simulation using MATLAB, draw the waveform.)

密码锁verilog源代码，包括四个七段数码管显示模块，设置密码以及输入密码校验模块(Password lock Verilog source code, including four of seven digital tube display module, set the password and password verification module)