vhdl语言实现的频率发生器，可以产生不同的频率

串行数据开发实用代码， 适合初级学习者使用 很不错(Serial data to develop a practical code for primary learners use very good)

I2C控制核设计,由VHDL语言编写,使普通I/O端口实现I2C性能-I2C control of nuclear design, VHDL language, I/O ports I2C Performance

adder 18b trong chuong trinh verilog

FPGA设计全流程－软件综合使用、 -FPGA design of the whole process- the integrated use of software, FPGA design of the whole process- the integrated use of software,

有限状态机是指输出取决于过去输入部分和当前输入部分是时序逻辑电路。在有限状态机中，状态寄存器的下一个状态不仅与输入信号有关，而且还与该寄存器的当前输入有关，因此有限状态机又可以认为是组合逻辑和寄存器逻辑的一中组合。下面代码是哈工大计算机学院CPU设计中关于有限状态机部分的代码。

随机数发生器

说明：  插值滤波器,用于音频解码调制解调,滤波器系数用移位相加实现(Interpolation filter, audio decoder for modulation and demodulation, filter coefficient shift combined with the realization of)

Complex of three-point Gauss-lengend the Formula pi, Including orbital maneuvering simulation, initial orbit calculation, University of numerical analysis algorithms.

采用xilinx的ROMIP核产生类似正弦信号，经过FFt后可以观察结果(Using the xilinx ROMIP nuclear generating similar sinusoidal signal can be observed through the results after FFt)

Quatus下用Verilog语言编写的双向交通灯控制系统，内含程序及波形图，注释详细，课程设计(Verilog language Quatus two-way traffic light control system, containing program and waveforms, detailed annotations, curriculum design)