vhdl语言实现的频率发生器，可以产生不同的频率

VHDL实现ALU的源代码，并且提供了一个详细的testbench！-ALU VHDL source code, and provide a detailed testbench!

用verilog编写的lms算法。可实现自适应滤波功能(Lms algorithm written in verilog. Adaptive filtering can be achieved)

用以VGA显示的小程序，很实用，挺有价值的(VGA display for a small program, very practical, quite valuable)

vc707 board getting started guide

用verilog 语言编译16QAM调制(a great complied code of 16QAM modulation for OFDM)

本程序是用verilog 编写的模块，用来在lcd1602上显示用tlc549采样的电压值(This program is written in verilog module, used in lcd1602 display with tlc549 sampled voltage value)

FPGA通过SPI总线配置AD采集芯片AD9648的程序，Verilog实现 (FPGA configuration via SPI bus chip AD9648 AD acquisition procedures, Verilog realization)

xilinx的zed板详细开发资料，对初学者和开发人员都有帮助(The Xilinx zed board detailed development information, helpful for beginners and developers)

spi转i2s的verilog程序，fpga是总模块，spi和i2s是子模块，shiftreg是转换-spi transfer i2s the verilog program, fpga is the total module, spi, and i2s is the sub-module, shiftreg is to convert

浙江大学体系结构实验代码 实现流水线的forwarding(Architecture, Zhejiang University Experimental code pipeline forwarding)