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dwt2d_latest[1].tar
说明: 小波变换的开源代码(Verilog HDL)包括有测试文件,本人看过,挺好。(code of dwt)
- 2020-12-15 19:39:13下载
- 积分:1
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vhdl 中各种数据类型的转换实现,可以调用函数库实现
vhdl 中各种数据类型的转换实现,可以调用函数库实现-date type change
- 2022-03-18 06:02:30下载
- 积分:1
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Lab5.5_Led_FPGA
使用verilog在fpga开发板实现流水灯,包括整个工程文件(This code is used for early learners to study verilog。)
- 2014-05-07 19:57:24下载
- 积分:1
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hamid
very nice program that i ensure anyone can use easily and will be efficient for hard project of elevator
- 2009-07-26 13:27:38下载
- 积分:1
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GPS全球定位接收机 原理与软件实现_12378929
本书从电子技术和通信系统的角度讲解gps接收机的设计开发原理,其内容集中在用户终端,即接收机的设计原理和软件实现上。全书分为两大部分,第一部分为理论篇,第二部分为实现篇。理论篇首先对导航的基本目的进行了阐述,并由一个浅显的二维导航系统对导航信号的特点进行了推导,随后阐述了gps信号格式,同时对于直接影响接收机性能的射频前端部分做了理论分析;实现篇主要对本书实现的软件gps接收机的系统实现和源代码进行了讲解,同时作为总结,将信号处理的结果和有意义的中间变量以图示的方式给出,可以使读者有一个感性的认识,同时提升学习兴趣。.
本书适合从事卫星导航接收机研发的技术人员和卫星通信接收机研究的研究人员,尤其是从事北斗系统研发的专业人员、cdma通信系统研发人员,以及通信电子类专业的高年级本科生和研究生阅读,既可作为教学培训的教材,也可作为相关专业工程技术人员的参考资料。(This book explains the design and development principle of the GPS receiver from the perspective of electronic technology and communication system. Its content focuses on the design principle and software implementation of the user terminal, that is, the receiver. The whole book is divided into two parts. The first part is the theoretical part and the second part is the realization part. Firstly, the basic purpose of navigation is expounded, and the characteristics of navigation signal are deduced by a simple two-dimensional navigation system. Then, the format of GPS signal is expounded. At the same time, the front-end part of radio frequency which directly affects the performance of the receiver is theoretically analyzed.)
- 2019-05-05 08:54:24下载
- 积分:1
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hdl_adder
MATLAB to HDL Code conversion
- 2020-06-17 12:40:01下载
- 积分:1
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walsh
沃尔什函数发生器工程文件,Quartus Ⅱ 13.0版本(Walsh Function Generator)
- 2020-07-03 08:20:01下载
- 积分:1
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priorityencodtest
parity encoder test bench
- 2015-02-08 00:32:00下载
- 积分:1
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sram_test_OK
主要是基于FPGA(EP2C8Q208I8)下的SRAM驱动,SRAM型号为IS61LV25616,程序语言为Verilog,开发环境为quartusII 7.0,为一工程,可直接下载到FPGA中,含电路图(Mainly based on FPGA (EP2C8Q208I8) driving under the SRAM, SRAM model IS61LV25616, programming language for Verilog, a development environment for quartusII 7.0, for a project, can be downloaded directly to the FPGA, including circuit diagrams)
- 2014-12-24 22:08:36下载
- 积分:1
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state-machine
一个简单的用verilog实现的售货机状态机设计,内有word介绍设计的原理(A simple realization of a vending machine with verilog state machine design, there are design principles introduced word)
- 2021-01-20 23:48:42下载
- 积分:1