文本液晶屏上显示计数器

i2c配置SAA7113，非常有用的程序，做视频采集类必看(i2c configure SAA7113)

说明：  xilinx fpga各版本mmcm/pll动态配置RTL代码，包括testbench(xilinx fpga mmcm/pll drp RTL code, including testbench)

verilog 双模块算术平均值计算模块，子模块在时钟上升沿技术，高层模块根据当前计数值计算算数平均(verilog double module arithmetic mean calculation module, sub-module in the clock rising edge technology, high-level module is calculated based on arithmetic average of the current count)

fpga VHDL语言，控制DDS产生频率可变的正弦波信号扫频-FPGA VHDL DDS

interruption routine for PIC16F877

此vhdl程序实现了在FPGA上构建UART通信串口。分为两部分，UART的发送端transfer和接收端receiver。需要外部根据需求提供波特率时钟。(This program implements the building vhdl UART serial interface on the FPGA. Divided into two parts, UART transfer sender and receiver receiver. Required to provide the baud clock external demand.)

关于基数分频技巧设计,基于VHDL语言,对实际设计有帮助-DIVIDE

IEEE1588de FPGA 程序，已测试，可直接用，方便(IEEE1588de FPGA program has been tested, can be directly used to facilitate)

cm12864液晶显示器的vhdl驱动代码，基于状态机的转换，实现显示功能。-descripe by the VHDL to drive the LCD cm12864,based on the FSM convertor,achieve the display function.

基于FPGA的16QAM，用verilog编写，其中DDS为自己编写，含设计文件和testbench。已通过moldesim软件仿真。 (FPGA-based 16QAM, with verilog writing, including DDS for their preparation, including design files and testbench. Simulation software has been through moldesim.)