该源码为VHDL语言编写的分频器，在W

16位并行相关器的VHDL程序-16 parallel with the VHDL-related procedures

clock for spartan 3 evaluatoin board

集成电路的规模日益扩大

一个在CPLD，EPM70128上实现的PWM控制源程序。(A CPLD, EPM70128 realize the PWM control on the source.)

Z源逆变器简单升压模拟仿真。调制方式为SPWM，通过设置三角波幅值和比较电压，即可调节输出电压。(Z-source inverter simple step-up simulation. Modulation mode SPWM, by setting the the triangle amplitude and the comparison voltage to regulate the output voltage.)

自己编写的，浮点数与整数之间的转换的Verilog HDL实现(Written by myself, it is converted into Verilog HDL integer floating point implementation)

通过EMIF连接fpga与dsp的代码-Through the EMIF connection FPGA code with dsp

xilinx Spartan 6 PCIE仿真教程，PIO方式，带有TLP包分析。(XILINX PCIE tutorial device spartan6 PCIE core version V2.4)

说明：  五阶CIC梳状积分滤波器，可以综合，非常有参考价值(Fifth-order CIC points comb filter, can be integrated and very useful)

Digital pre-distortion (DPD) is an advanced digital signal-processing technique that mitigates the effects of power amplifier (PA) nonlinearity in wireless transmitters. DPD plays a key role in providing efficient radio digital front-end (DFE) solutions for 3G/4G basestations and beyond. Modern FPGAs are a promising target platform for the implementation of flexible wireless DFE solutions, including DPD.