A Dec example written in VHDL.

class diagram diagram for AIRS

matlab code for communication

说明：  使用FPGA实现中值滤波算法，能够使数据直接使用该系统对数据进行中值滤波。(FPGA is used to realize the median filtering algorithm, which can make the data directly use the system for median filtering.)

很不错的FPGA入门级实验指导书，按照实验的知道，能够学会使用ISE仿真简单的流水灯。教程较为详细，从硬件连接到代码编写都做了详细指导，适合新手入门。(Very good entry-level FPGA experimental guide books, according to the experiment know, be able to learn to use the ISE Simulator simple water lights. Tutorial in detail, the hardware connected to the coding have done a detailed guide for beginners.)

这是fpga按键消抖的源代码，在很多fpga按键实验中都可以用到，能够进行代码移植。(This is the source code of the FPGA buttons, in many FPGA key experiments can be used, and can carry out code.)

用VHDL语言实现的蜂鸣器发声程序，当按下不同按键时，发出不同频率的声音(Function:when different buttens are pressed, beep will play sound with different frequency. laguage:VHDL)

OFDM modulation source code written in Matlab

This project features a full-hardware sound compressor using the well known algorithm: IMA ADPCM. The core acts as a slave WISHBONE device. The output is perfectly compatible with any sound player with the IMA ADPCM codec (included by default in every Windows). Includes a testbench that takes an uncompressed PCM 16 bits Mono WAV file and outputs an IMA ADPCM compressed WAV file. Compression ratio is fixed for IMA-ADPCM, being 4:1. PLEASE NOTICE THAT THIS CORE IS LICENSED UNDER http://creativecommons.org/licenses/by-nc-sa/3.0/ (Creative Commons Attribution-Noncommercial-Share Alike 3.0 Unported). That means you may use it only for NON-COMMERCIAL purposes.

基于MAX2运用Quartus实现串口通信-MAX2-based use of Quartus Serial Communication

verilog开发FPGA，实现RS485串口通信(RS485 driver for FPGA )