I2C verilog 源代码 非常好的代码，大家可以

扰码器的FPGA实现，选择的扰码器规格为15位移位寄存器。(FPGA scrambler, scrambler specifications for a 15 bit shift register.)

基于verilog hdl编写的FPGA正弦信号发生器，已测试。(FPGA sine signal generator)

gaisler公司在2011年发布的的leon3的源代码！(source code of leon3 )

说明：  基于数据通路和控制器的高校简单PPM设计(PPM design based on datapath and controller)

des加密算法的verilog语言的实现-des encryption algorithm to achieve the Verilog language

Matlab - to hdl code for square root

IIC总线协议，VHDL语言编写，可以直接使用-IIC bus protocol, VHDL language can be used directly

说明：  用Verilog编写的简单的运算单元（ALU），可实现加、减、与、或、异或、非、左、右移等功能(Verilog prepared with simple arithmetic unit (ALU), can be add, subtract, and, or, exclusive-OR, non-, left, and other functions shifted to right)

用Verilog实现1602的配置及功能。正确编译与实现(Realized by Verilog 1602 configurations and functions. Compilation and implementation of the right)

PCI arbi verilog source code