标准电视信号的同步生成程序，利用VHDL和原理图，利用Quartus综合...

I2C 控制器的 Verilog源程序2(I2C controller Verilog source 2)

一个具有“百分秒，秒，分”计时功能的数字跑表，可以实现一个小时以内的精确至百分之一秒的计时。 数字跑表的显示读者可以通过编写数码管显示程序来实现，本训练只给出数字跑表的实现过程。 读者还可以通过增加小时的计时功能，实现完整的跑表功能。-A " percentage of seconds, seconds, minutes," digital stopwatch timer can be achieved within an hour of precision to the hundredth of a second time. Digital stopwatch readers can display the digital display through the preparation of procedures to achieve, given the training is only the realization of the process of digital stopwatch. Readers can also function to increase hours of time to achieve full stopwatch function.

用于FPGA实现单总线测温电阻DS18b20时序。在xilinx spartan 3中试过。-failed to translate

Cadence_manual_1.2.pdf

存储器控制FPGA程序，包括ram，fifo，sdram，flash等。-FPGA memory control processes, including ram, fifo, sdram, flash and so on.

数字滤波器包含IIR数字滤波器和FIR数字滤波器。本设计的工作主要是Labview软件部分，包括信号生成模块、滤波模块、显示模块的设计(IIR digital filter comprises a digital filter and FIR digital filters. The design work is mainly Labview software parts, including signal generation module, filter module, display module design)

3x3中值滤波器的FPGA实现现(VERILOG)可直接使用。 (3x3 median filter FPGA implementation of the present (VERILOG) can be used directly.)

4X4电子密码锁的中央控制系统。控制6位输入。-4x4 electronic locks central control system. Six input control.

基于FPGA的自治型SPWM波形发生器的设计！正弦脉宽调制（SPWM）技术在以电压源逆变电路为核心的电力电子装置中有着广泛的应用，如何产生SPWM脉冲序列及其实现手段是PWM技术的关键。大家共同探讨哈！-FPGA based SPWM autonomy-based waveform generator design! Sinusoidal pulse width modulation (SPWM) technology in the voltage source inverter circuit as the core of the power electronic devices have a wide range of applications, how to generate SPWM pulse sequence and its implementation means PWM technology is the key. Kazakhstan investigate everyone!

有用的数字钟设计文档，有秒表、闹钟等模块，希望对大家有用！(JUST LEARN FROM IT!!ENJOY!)