本文介绍了一种使用4蝴蝶（米，氮）的根元素

Fpga开发应用，jtag方面的源代码，VHDL-Fpga development and application, jtag in the source code, VHDL

一个简单移位寄存器代码，verilog HDL编写(a simple shift register example，write with verilog HDL)

FPGA based design and Implementation of Advanced Encryption Standard

采用VHDL编写的步进电机控制程序-stepping motor controlling program written by VHDL

说明：  access must be conf urr arr

Module for filtering input digital signal

实现十六位加法器，是书籍上配套的应该可用-This is an 16 bit adder using vhdl

UART文件 包括发送器 接收器 fifo 测试文件(UART file includes a receiver transmitter fifo test files)

设计制作一个检测4*4矩阵键盘的按键编码的实验，把实际按键的键值的八位编码先转换成从0000—1111的编码，再译成数码管能识别的八位编码，在数码管动态显示时，4*4矩阵键盘的第一行对应00—03，第二行对应04—07，第三行08—11，第四行对应12—15。(Design a 4* 4 matrix keyboard key coding experiments to detect the key the actual key octet coded first convert from 0000-1111 encoding, and then translated into digital tube to identify the eight coding, digital tube dynamic display, the first line of the 4* 4 matrix keyboard corresponding to 00-03, the second line corresponds to 04-07, the third line of 08-11, the fourth line corresponds to 12-15.)

用FPGA实现DDS的原理图，结构清晰，采用总线方式与外部单片机通信-FPGA realization of DDS with the schematic diagram, structural clarity, the use of bus-way communication with the outside Singlechip