本文介绍了一种使用4蝴蝶（米，氮）的根元素

FIFO的VERILOG代码编写 可综合的Verilog FIFO存储器(The VERILOG code FIFO write comprehensive Verilog FIFO memory)

Digital Design and Modeling with VHDL and Synthesis

数字频率计(试验报告)适合初学者参考-Digtal Frequency Test(experiment report) suit Raw recruit reference

说明：  八通道ad采集，用于和fpga的联调测试，需要注意ADS1278的模式类型(Eight channel AD acquisition)

基二8点fftverilog实现。经过modelsim仿真通过(Base 2 fftverilog implementation at 8 o clock. Go through the modelsim simulation)

用verilog写的基于cpld的出租车计费器的源码，需要的参考一下-Use verilog to write a taxi based cpld billing device source code, need to refer to

通过神经网络实现的PID算法，整个工程文件，调试通过。(By PID algorithm neural networks, the entire project files, debugging through.)

The term web server can refer to either the hardware (the computer) or the software (the computer application) that helps to deliver web content that can be accessed through the Internet.(web server)

adpcm .c程序代码，完整,通过编译仿真(ADPCM c program code, complete compiled simulation)

用来实现IRIG_B码的解码程序，在XILINX ISE上运行过没有问题，(Used to achieve IRIG_B code decoding process, in XILINX ISE run-off is no problem,)