here is realized simple FIFO stack in vhdl. very simple example, but very help...

用于FPGA实现单总线测温电阻DS18b20时序。在xilinx spartan 3中试过。-failed to translate

This the adder VHDL code, it contains input and output fild, also simulate file-adder

设计题目：基于MATLAB的FFT算法的设计 设计内容： 所设计的FFT算法应完成以下功能： （1）在MATLAB环境下编写FFT算法（不调用系统现有函数）； （2）实现对选定图片进行FFT计算、还原（IFFT计算），并与系统FFT函数做对比，进行分析； （3）设计GUI界面。 (Design topics: content based on the the MATLAB FFT algorithm design design: the design of the FFT algorithm should perform the following functions: (1) the FFT algorithm written in MATLAB environment (do not call existing function of the system) (2) to achieve the selected picture for FFT calculation, restore (IFFT calculation) system FFT function analysis (3) design GUI interface.)

FPGA实现FFT算法的源代码及工程文件，此工程为ISE工程项目。有详细的说明，可以运行。(FPGA Implementation of FFT algorithm source code and project files, this works for the ISE project. There are detailed instructions, you can run.)

这是分数阶傅里叶变换FRFT的土耳其算法的FPGA实现的程序，FPGA是Xilinx的virtecx-5，这是我在做毕业设计的时候自己编写的，希望能对你有帮助！(This is the fractional Fourier transform algorithm FRFT Turkish FPGA implementation of the program, FPGA is the Xilinx virtecx-5, which is what I was doing graduate design time I have written, I hope you can help!)

16级流水线型cordic旋转代码以及测试文件，亲测好用(16-stage pipelined cordic rotation code and test files, pro-testing)

QAM调制，基于FPGA的实现，包含有乘法器模块、升降余弦滤波器模块、QAM序列生成模块(QAM modulator,the implementation based on FPGA,include MUL、FIRCOS and QAM generate)

频率计 测量范围1-100MHz 测量阈值0.1s 计数部分为FPGA/CPLD 语言VHDL 显示部分为51 单片机加八位数码管 语言C(Frequency meter Measuring range 1-100 MHZ Measure threshold is 0.1 s Count part of FPGA/CPLD Language VHDL Display part of 51 MCU with eight digital tube Language C)

中芯国际130nm库文件，在DC综合练习中可以使用，并能帮帮助理解库的含义-DC　Ｖｅｒｉｏｇ，已通过测试。 (SMIC 130nm library file, you can use in the DC Comprehensive Exercises, and help to help understand the meaning of the library-DC Veriog has been tested.)

说明：  verilog语言写的SPI接口,全同步设计,低门数,可以很容易应用到嵌入设计方案中.(Verilog language to write the SPI interface, all synchronous design, low gate count. it is very easy to use embedded design programs.)