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FPGA SDRAM读写
SDRAM即同步动态随机存储器,同步是指memory工作需要同步时钟,内部命令的发送与数据的传输都以它为基准;动态是指存储阵列需要不断地刷新来保证数据不丢失;随机是指数据不是线性依次存储,而是自由指定地址进行数据读写
- 2022-07-05 13:52:56下载
- 积分:1
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04_uart_test
说明: 基于FPGA,用verilog hdl语言实现串口收发实验(Based on FPGA, using Verilog HDL language to achieve serial port transceiver experiment)
- 2021-03-14 13:43:49下载
- 积分:1
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MUX
Multipleksor
3 to 1 - 3x1bit in, 1x1bit out
- 2013-09-18 16:21:25下载
- 积分:1
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con1
4 bit convoltion with vhdl.
- 2011-10-18 18:18:09下载
- 积分:1
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aurora_IP
Aurora协议是一款高带宽、低成本、可扩展、框架简洁、适合点对点串行数据传输的协议。(Aurora protocol is a high-bandwidth, low-cost, scalable, simple framework for point to point serial data transfer protocol.)
- 2017-03-10 17:16:22下载
- 积分:1
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DFT_S_OFDM_lyl
LTE上行链路使用的DFT-S-OFDM系统的仿真,其中包括QPSK星座映射、串并转换、N点DFT、子载波映射等。(LTE uplink using the DFT-S-OFDM system simulation, including QPSK constellation mapping, string and conversion, N-point DFT, subcarrier mapping, etc..)
- 2020-11-01 20:59:55下载
- 积分:1
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频率计实验程序代码
说明: XC7A35TCSG324-1的Verilog频率计程序,支持十分频,支持切换内外信号输入(Verilog frequency meter program of xc7a35tcsg324-1 supports decadal frequency division and switching internal and external signal input)
- 2019-12-24 13:40:45下载
- 积分:1
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24小时计时时钟
实现24小时计时,因为位数不够,这里是12进位,可自行调整进位数(Realize 24-hour timing, because the number of digits is not enough, here is 12 carry, you can adjust the carry number by yourself.)
- 2020-06-23 19:40:01下载
- 积分:1
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DAC5578_I2C
TI公司的DAC5578驱动程序,经测试过的,CSDN资源分享(DAC5578 Driver of TI Company Tested and CSDN Resource Sharing)
- 2020-06-18 21:40:01下载
- 积分:1
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bayer2rgb
bayer to rgb,
module Bayer2RGB(
input MainClk,
input nRST,
input iVsync,
input iHref,
input[9:0] iPixelData,
&nbs
- 2022-08-17 06:48:57下载
- 积分:1