verilog实现CPU处理系统

verilog 编写的比较最大值最小值得的程序，而且能够求出最大最小值在ram中存储的位置，测试通过下载即用(Comparison of the maximum write verilog smallest worthwhile program, and minimum and maximum values ​ ​ can be obtained is stored in ram position, the test that is used by downloading)

用于实现锁相光子计数技术的累加器，verilog语言(Accumulator achieve specific cases for accumulator lock detection of photon counting technique)

获取主机CPU信息，VS2008编译通过，含详细说明(Get information on the host CPU, VS2008 compiler, containing detailed instructions)

Very suitable for the study using computer vision, Analysis of the signal time domain, frequency domain, cepstrum, cyclic spectrum, etc. The performance of the program has reached a high level.

da6578的IIc时序驱动verilog，次代码仿真验证通过，有需要的同志可以下载下来参考，同时需要IIC时序的操作，也可以下载下来进行参考来做一些相应的接口时序来完成你们对应的工作。  

ahb uvc is an on chip communication protocol for high speed integration and low power utilities performance protocols widely used in all vip applications

Introduction to learn laboratry with altera quartus II 9.1

lacp代码，可以参照学习Lacp协议的相关状态机等知识(LACP code, can refer to the relevant state machine learning knowledge of Lacp protocol)

基于VHDL语言的DPLL电路的设计，给出了设计方案和部分源代码 (DPLL)

它包含了曼彻斯特编码和解码的Verilog文件。它解释了曼彻斯特编码方案和解码方案的基本原则1553总线结构。它给人的主意，还写Verilog代码