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AD_FIFO
简单的Verilog程序,针对音频实验板的AD到DA调通试验,下载执行前请按照自己试验环境更改设置(Simple Verilog program for test the AD to DA loop of universal audio test platform.
Please configure it according to the test environment before download and implement the program to FPGA)
- 2013-01-26 00:47:37下载
- 积分:1
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sin_wave
在vivado开发环境下,调用ram IP,实现可调频的正弦波信号发生器。(vivado IP signal generator)
- 2020-09-21 23:27:52下载
- 积分:1
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Vhdl_Programming_Example
vhdl编程语言电子书,英文的,有很多例子(VHDL programming language e-books, in English, there are many examples of)
- 2009-01-16 20:59:00下载
- 积分:1
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VGA
VHDL语言实现VGA的显示彩条横条九宫格的功能。(VGA display color of the VHDL language bar Jiugongge function.)
- 2013-05-07 10:04:10下载
- 积分:1
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vhdl-golden-reference-guide
vhdl golden reference guide
- 2012-12-31 03:56:13下载
- 积分:1
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rtl_wangjiangxing
ecc椭圆算法RTL,verilog源代码经过验证,用于FPGA或者ASIC(ECC elliptic curve encryption algorithm for Verilog implementation)
- 2015-01-29 18:43:47下载
- 积分:1
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Quartus
QuartusII多路选择器,数字电路环境,大三EDA技术实验(Quartus,chosen conductos in matheathics field)
- 2012-10-30 16:26:11下载
- 积分:1
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用VHDL语言编写的代码,以供大家学习和交流,方便大家学习!...
用VHDL语言编写的代码,以供大家学习和交流,方便大家学习!-prepared using VHDL code for all to study and exchange to facilitate learning!
- 2022-02-04 03:08:53下载
- 积分:1
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VHDL language is designed to be simple to use the CPU, the focus of the design o...
用VHDL语言设计简单的CPU,重点设计微操作代码,然后设计CPU各组成模块,最后根据设计的微操作设计微指令,验证设计的正确性。可基本实现加、减、乘、除、移位、循环等操作。-VHDL language is designed to be simple to use the CPU, the focus of the design of micro-operation code, and then design the components of CPU module designed the final design of the micro-operation microinstruction to verify the correctness of the design. Can achieve the basic add, subtract, multiply, divide, transfer, recycling and other operations.
- 2022-01-26 04:06:25下载
- 积分:1
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DW_apb_rtc
verilog实现RTC功能,可直接用于芯片开发中。(verilog achieve RTC function can be directly used for chip development.)
- 2020-12-28 16:49:01下载
- 积分:1