基于任意波形发生器的实现可编程逻辑器件…

usb1.1的设备控制器IP核，是用verilog硬件描述语言写的-USB1.1 IP core for device control, written with hardware describing language of Verilog.

verilog编写实用多功能电子表-Verilog prepared practical multi-function electronic Table

内置自修复分析仪

credit base network on chip(network on chip (noc))

FPGA设计全流程－软件综合使用、 -FPGA design of the whole process- the integrated use of software, FPGA design of the whole process- the integrated use of software,

数字频率测量器，脉宽测量器。可测量多种频率波形的脉宽。(Digital frequency measurement device, pulse width measurement device. Measurement of the waveform of frequency pulse width)

FPGA控制的SRAM接口不分的设计-FPGA-controlled SRAM interface design, regardless of

this project is based on jk and t flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural techniques are used. -this project is based on jk and t flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural techniques are used.

二进制转十进制BCD码 Verilog语言 quartusII(Binary to decimal BCD code Verilog language quartusII)

Altera DE2 开发板试验2 第1部分VHDL答案(Altera DE2 Lab2 part1 VHDL answer)