在USB contreoller CRC5块

用VHDL语言编写的LDPC码硬件实现语言，相对于verilog的，比较简单-Using VHDL language LDPC code hardware implementation language, compared to Verilog, and relatively simple

本文提出了一种新颖的可逆乘法器。可逆逻辑可以发挥重要作用

turbo码的verilog程序，有意者请下载。(turbo code verilog procedures Interested parties please download.)

使用Verilog编写的正弦波生成工程，使用ROM核产生，利用mif文件(Written using Verilog sine wave generation projects using ROM nuclear generation, use mif file)

Verilog投币式手机充电仪 清华大学数字电子技术基础课程EDA大作业。刚上电数码管全灭，按开始键后，数码管显示全为0。输入一定数额，数码管显示该数额的两倍对应的时间，按确认后开始倒计时。输入数额最多为20。若10秒没有按键，数码管全灭。(Verilog coin operated cell phone charger EDA major homework of digital electronic technology foundation course, Tsinghua University. Just put on the digital tube completely extinguished, press the start button, the digital tube display is 0. Enter a certain amount, the digital tube shows the amount of double the corresponding time, according to the confirmation began countdown. The maximum amount of input is 20. If there is no button in 10 seconds, the digital tube will die out.)

JPEG标准下图象压缩的vhdl实现工程，文件包括一个图像。-JPEG image compression standard works of VHDL realize that the document includes an image.

非常好的catapult学习书, catabult 可用于高级综合，由c产生vhdl/verilog(very nice book for catabult study)

说明：  verilog 编写的I2C程序，控制D/A的(I2C program written by Verilog to control D/A)

在vivado开发环境下，调用ram IP，实现可调频的正弦波信号发生器。(vivado IP signal generator)

VHDL operators basics