altera推出的基于它们fpga和cpld的构建嵌入式系统的新技术sopc的介绍。其集成在quartus II中...

重点介绍了双线性插值算法和该方法的Ｆ Ｐ ＧＡ硬件实现 方法， 包括图像数据缓冲单元、 插值系数生成单元以及插值计算单元等。(Highlights the bilinear interpolation algorithm and the method of F P GA hardware The method includes an image data buffer unit, the interpolation coefficient generating unit and an interpolation computing unit and the like.)

AHB master monitor for verification

ADC-DAC transmittion works thru SPI on 25 MHZ. Used for some student project on Xilinx sprtan3a FPGA

用VHDL语言在CPLD上实现串行通信-using VHDL on the CPLD Serial Communication

针对AD9826驱动设计的Verilog代码，主要是配置ccd采样的设计(The Verilog code is designed for AD9826, to configuration ccd sampling )

VHDL经典设计，值得参考。压缩包里面文件直接用记事本打开即可。-VHDL design classic, it is also useful.

NIOSII I2C接口模块及驱动程序，并含有测试程序。对想开发NIOS的工程师很有帮助(NIOSII I2C interface module and driver, and contains the test procedures. NIOS of engineers want to develop useful)

half band filter code

basys3的数字钟，可以显示00.00-59.59(Digital clock of basys3,It can display 00.00-59.59)

Xilinx ISE 8.2i的license-Xilinx ISE 8.2i s license