采用VHDL编写的一个简单的UART

说明：  misp顶层文件，verilog实现misp架构，并且支持modelsim仿真(Verilog implements MISP architecture and supports Modelsim simulation)

说明：  fpga串口收发完整程序，Verilog语言。(FPGA configuration PLL complete program, Verilog language.)

verilog实践 elc_clock 电子时钟设计(Verilog design practice elc_clock electronic clock)

SOPC系统的I2C代码 直接可用，可作为ＩＰ核用到自己的系统中(SOPC system I2C code directly available, can be used as an IP core in your system)

Wishbone dma ip core

说明：  quartus 的一个实例,希望对刚刚学习quartus 的人有点帮助(Quartus an example, in the hope that people just learning a little help Quartus)

这是很全的标准库啊，不是1164.vhd，都是一些加，乘，除，平方等操作的包来的．-This is the standard for the whole ah, not 1164.vhd are some increases, multiplication, addition, operational square packages to come.

vhdl code for multiplexer and detemines how multiplexer works

简易电子钟的设计（verilog HDL）(Simple design of the electronic clock (verilog HDL))

利用FPGA设计游戏设计，真人版超级玛丽，VGA显示(Using FPGA design game design, live-action version of Super Mario, VGA display)