Temperature measurement Using LabVIEW FPGA, Spartan3E, PMODTMP

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基于VHDL语言的汉明码的译码，含有校正子跟纠错检错功能-Based on the VHDL language decoding Hamming Code, which contains sub-calibration error with error correction function

非常详细的千兆以太网MAC verilog代码，可以供硬件设计时有关网络的开发参考(Very detailed Gigabit Ethernet MAC verilog code, can be used for hardware design of the network to develop a reference)

多倍（次）分频器 请注意: 本例的各个源描述的编译顺序应该是: 52_divider.vhd 52_divider_stim.vhd-Times (times) divider Please note: This case is described in various sources to compile the order should be: 52_divider.vhd 52_divider_stim.vhd

this a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the supporting file for keyboard interface and it also included a intro.vhdl file required for the startup animation file.-this is a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the supporting file for keyboard interface and it also included a intro.vhdl file required for the startup animation file.

 ；建立一个录音机，用于录制和播放8位数字音频样本。实现了一个低通FIR滤波器模块，可以用作抗混叠和重构滤波器。

This the adder VHDL code, it contains input and output fild, also simulate file-adder

适用于满足I2C协议的flash读/写操作程序，只需要设置要读/写的字节数，就可以直接使用！-Applicable to meet the I2C protocol flash read/write operations, only need to set to read/write number of bytes can be used directly!

低电源电压范围为1.8 V至3.6 V 超低功耗： - 主动模式：280μA，在1 MHz，2.2伏 - 待机模式：1.1μA - 关闭模式（RAM保持）：0.1μA 五省电模式 欠待机模式唤醒 超过6微秒 16位RISC架构， 125 ns指令周期时间 12位A/ D转换器具有内部 参考，采样和保持，并 AutoScan功能 16位Timer_B随着三† 或七‡ 捕捉/比较随着阴影寄存器 具有三个16位定时器A 捕捉/比较寄存器 片上比较器 串行通信接口（USART）， 选择异步UART或 同步SPI软件： - 两个USART（USART0 USART1）的† - 一个USART（USART0）‡ 掉电检测 电源电压监控器/监视器 可编程电平检测 串行板载编程， 无需外部编程电压 安全可编程代码保护 融合(Low Supply-Voltage Range, 1.8 V to 3.6 V Ultralow-Power Consumption: − Active Mode: 280 µ A at 1 MHz, 2.2 V − Standby Mode: 1.1 µ A − Off Mode (RAM Retention): 0.1 µ A Five Power Saving Modes Wake-Up From Standby Mode in Less Than 6 µ s 16-Bit RISC Architecture, 125-ns Instruction Cycle Time 12-Bit A/D Converter With Internal Reference, Sample-and-Hold and Autoscan Feature 16-Bit Timer_B With Three† or Seven‡ Capture/Compare-With-Shadow Registers 16-Bit Timer_A With Three Capture/Compare Registers On-Chip Comparator Serial Communication Interface (USART), Select Asynchronous UART or Synchronous SPI by Software: − Two USARTs (USART0, USART1)† − One USART (USART0)‡ Brownout Detector Supply Voltage Supervisor/Monitor With Programmable Level Detection Serial Onboard Programming, No External Programming Voltage Needed Programmable Code Protection by Security Fuse)

国外的VHDL应用例子，大家可一好好参考一下！-abroad VHDL Application examples, we can make reference to a properly!