Building the CPU datapath

扰码器的verilog实现,参考802.11a相关标准(Scrambler in verilog implementation)

QPSK调制的载波频偏估计，是一个可以调用的函数。接收端进行了一系列的处理。经典的Fitz法(QPSK-carrier frequence offset estimation_ Fitz)

这是我自己编写的三分频，也就是奇数分频，占空比为1：1，当然如果需要其它奇数分频，只要将程序里面的N和counter修改即可-This was my third prepared by the frequency, which is odd hours, frequency and duty ratio of 1:1. Of course, if the needs of other odd hours, frequency, as long as the proceedings inside the N and counter can be amended

矩阵键盘扫描和led显示 这样子可以得到要输入的键码，并通过led显示出来(KEYBOARD AND DISPLAY LED)

16卫浮点FFT算法的VHDL实现，有测试文件。-16 floating-point FFT algorithm Wei VHDL realize, have the test paper.

采用FPGA实现的DDS波形发生器源码，可以实现频率幅值变换、正弦波、方波、三角波输出，输出频率可达1MHz(FPGA implementation of the DDS waveform generator source frequency amplitude transform, sine wave, square wave, triangle wave output, the output frequency up to 1MHz)

这是altera公司的DE2-35开发板下的一个PS2键盘的源程序代码工程，包括PS2驱动等模块有需要的人，可以下载(Altera DE2-35 development board of the company, the source code of a PS2 keyboard works, including the the PS2 driver modules need, you can download)

vhdl子程序，本人收集的，比较常用的代码-VHDL subprogram, I collected to compare commonly used code

实验用16位全加器的VHDL代码，适合初学者学习，数电学习的好工具。 (Experiment with 16-bit full adder VHDL code for beginners to learn, a good tool to learn a few power.)

一个用VHDL设计的DDS信号发生器，包括两个pics的仿真结果。