Building the CPU datapath

clock for spartan 3 evaluatoin board

relative cpu design implementation

实现QR_RLS算法,基于fpga 的非线性功放的dpd实现(realize QR_RLS)

mult,在quartusII中，以模块输入形式，仿真乘法器mult，得到时序图和功能图(a simulation example of mult)

高科技的发展使芯片设计不再是半导体工业的领域，现场可编程逻辑阵列（FPGA）的出现使通过软件来快速实现芯片设计成为可能。本系统是广泛面向全球的工程技术人员和大专院校学生，使您能够在最短的时间内掌握FPGA的应用与VHDL/AHDL/Verilog HDL这一电子逻辑设计利器，迅速的加入高级电子设计人才行列。-The development of high-tech chip design is no longer the field of semiconductor industry, field programmable logic arrays (FPGA) through the emergence of chip design software to quickly achieve the possible. This system is a broad global engineering and technical personnel and college students, so that you can in the shortest possible period of time to master the application of FPGA and VHDL/AHDL/Verilog HDL logic design of the electronic weapon, quickly adding advanced electronic design talent ranks.

基于SHA-1算法和DS28E01加密芯片的FPGA系统设计，该上传文件为整个设计的系统文件。Quarter软件编程的Verilog程序，包含仿真调试界面。(Design of FPGA system based on SHA-1 algorithm and DS28E01 encryption chip。)

基于verilog的FFT设计，使用vivado作为开发平台(Verilog based on the FFT design, the use of vivado as a development platform)

DE2-115开发板LED显示测试源码，对fpga开发者提供参考(DE2-115 development board LED display test source, provide a reference for fpga developer)

说明：  ilx554b型号CCD积分时间程序的设计，包括两座控制信号(program for ilx554b,the driver include two parts single)