simple code based on verilog shifter , cla ,clg , ALU , PC

使用vhdl语言设计一位全加器，在仪器上下载并实现LED灯的闪亮(A full adder design)

说明：  4位加法器，4位数字相加及进位功能的实现，主要利用Verilog语言实现，简单轻松，且代码量少(a adder which can realize 4 bit numbers adding)

DA 实现用于 FIR 实现筛选器假定系数固定的那冲激响应和这种行为使得它可能使用的基于 ROM 的下尿路症状

实现米粒状态机 用verilog语言实现状态机的过程(Implement a state machine with a grain of rice verilog state machine language course)

基于Basy3的贪吃蛇小游戏，实现了相关功能。(Snake Eating Game Based on Basy3)

实验课的作业，包括半加器、全加器、加/减法器，使用逻辑图和VHDl描述，包括分析和报告。-experiment include the operation of a half adder, full adder, plus/subtraction device, and the use of logic diagram VHDl description, including analysis and reporting.

说明：  交通灯的控制，分主干道和从路交通灯，主路优先，正常情况下，绿灯60s，红灯30S，黄灯5S(Traffic light control)

xilinx的zed板详细开发资料，对初学者和开发人员都有帮助(The Xilinx zed board detailed development information, helpful for beginners and developers)

win10的xilinx usb驱动，较新版本(Xilinx USB driver for win10, newer version)

bch encoder+decoder 源代码，Flash控制器，通讯都需要用到哦-bch encoder+ decoder source code, Flash controller, communications are needed Oh