基于FPGA的相位测量原理图，通过对正弦信号过零比较进入FPGA，测量相位差。可用于测量导纳等应用中。...

基于FPGA的技术溢出研究程序，只是一个测试程序，大家可以下着用一下。-FPGA-based research process of technology spillovers is only a test procedure, we can next look forward to using.

五级流水线CPU实现（带Hazard），还没来得及实现Cache求高人指教(pipeline CPU with Hazard)

说明：  内有一PCI 主 和PCI从，PCI TARGET 都是公开代码的，是工程文件，有仿真工程，使用说明。觉得好的就推荐一下。 本PCI_HOST目前支持： 1、 对目标PCI_T进行配置； 2、 对目标进行单周期读写； 3、 可以工作在33MHZ和66MHZ 4、 支持目标跟不上时插入最长10时钟的等待。 ALTERA的PCI竟然收费的！！！软件里面调试仿真了半天，终于调通了，到了下载就突然弹出窗口说包含了有限制的IP CORE，是限制使用的(There is a PCI from PCI proprietors, PCI TARGET is open source, is the project document, there is simulation project, for use. Feel good about the recommendation. The PCI_HOST currently supports: 1, on the target configuration PCI_T 2, on the target for single-cycle read and write 3, can work in the 33Mhz and 66MHZ 4, to support the goals behind to insert a maximum of 10 clock hours of waiting. ALTERA the PCI even charges! ! ! Inside simulation software debugging for a long time, and finally had transferred to the download on the sudden pop-up window that contains a limited IP CORE, is to restrict the use of)

180nm数字教学库，内含各种标准数字单元(180nm digital lib for education, including standard cells)

适用于NIOS II的1024点FFT C算法( 1024-point FFT C algorithm for NIOS II)

串并转换程序，由串行输出转换为4位的并行输出-String and the conversion process, from the serial output is converted to 4-bit parallel output

合众大公司XILINX_V4实验箱原理图-United XILINX_V4 large companies schematic experimental box

基于FPGA的VHDL，can总线控制的设计与实现，在ISE下弄的。(FPGA-based VHDL, can control the design and implementation of the bus, get under the ISE' s.)

VGA interface using Spartan3E board from DIGILENT.Labview .vi

用状态机实现密码锁State machine used to achieve code lock-State machine used to achieve code lock