登录
首页 » VHDL » csbar(3) : X"E0000" to X"E01FF"

csbar(3) : X"E0000" to X"E01FF"

于 2022-02-26 发布 文件大小:813.00 B
0 143
下载积分: 2 下载次数: 1

代码说明:

-- M68008 Address Decoder -- Address decoder for the m68008 -- asbar must be 0 to enable any output -- csbar(0) : X"00000" to X"01FFF" -- csbar(1) : X"40000" to X"43FFF" -- csbar(2) : X"08000" to X"0AFFF" -- csbar(3) : X"E0000" to X"E01FF" -- download from www.pld.com.cn & www.fpga.com.cn --- M68008 Address Decoder-- Address decod er for the m68008-- 0 asbar must be to enable any o utput-- csbar (0) : X "00000" to X "01FFF"-- csbar (1) : X "40000" to X "43FFF"-- csbar (2) : X "08000" to X "0AFFF"-- csbar (3) : X "E0000" to X "E01FF"-- download from www.pld. com.cn

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • 100vhdlsimple
    说明:  100个vhdl例子,对初学者很有用,可以用MAX+PLUS 2来编译仿真的(100 vhdl example, useful for beginners, you can use the MAX+ PLUS 2 to compile the simulation)
    2010-05-02 10:01:58下载
    积分:1
  • at96
    isa总线接口,可以实现与isa总线 的IO和MEMERY接口(isa bus interface can be achieved with the isa bus IO interfaces and MEMERY)
    2008-05-15 20:36:51下载
    积分:1
  • ser_to_parr
    很有用的10bit串并转换verilog程序,需要的可以拿去参考下,在quartusII上已验证过(Useful 10bit string and convert verilog program, need to take a reference, has been verified in quartusII)
    2012-05-21 16:21:22下载
    积分:1
  • 一个用VerilogHDL语言编写的模6的二进制计数器
    一个用VerilogHDL语言编写的模6的二进制计数器-a Verilog HDL language used in the preparation of the six-binary counter
    2022-03-22 05:41:51下载
    积分:1
  • sep_fram_v0.0
    直接序列扩频系统的收发系统,可以进行参数配置(this is a Verilog program )
    2016-03-01 13:22:03下载
    积分:1
  • ADC TLC5510的测试程序,经过测试是非常简单和容易的
    ADC TLC5510的测试程序,经过测试通过,十分简单好用-ADC TLC5510 test procedures, after the test is very simple and easy
    2022-03-17 18:38:12下载
    积分:1
  • synplify-hand-book(English)
    Syplify经典英文教程。内含众多实验例程,Lab 1 Basic Synplify Run;Lab 2 Analyzing Critical Path and Assigning Timing;Lab 3 FSM (Finite State Machine) Compiler Constraints and Attributes(Syplify classic English tutorial. Contains numerous experiments routine, you can help learners to quickly grasp Syplify tips, is a rare foreign experiments tutorial.)
    2015-04-20 09:01:06下载
    积分:1
  • mp3decoder
    verilog实现mp3解码程序,包括testbench(mp3 decoder verilog implementation procedures, including the testbench)
    2020-12-31 15:38:59下载
    积分:1
  • awb
    自动白平衡的verilog实现 通过逻辑实现了白平衡算法(awb design awb design awb design awb design awb design )
    2012-09-04 13:09:50下载
    积分:1
  • sdio_slave
    SDIO slave verilog code
    2021-03-26 15:39:13下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载