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VHDL_SPISLAVE
spi-slave通信的vhdl实现及其仿真(VHDL implementation of spi-slave communication)
- 2017-12-16 18:28:15下载
- 积分:1
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SPI模块设计
一个串口通信传输的实验程序设计,在一般的通信协议中涉及到数据发送与接收的问题,为了快速实现数据的发送,通常使用的是串行传输的方法,把数据一个一个的发送出去,因此这里设计了一个发送程序。
- 2022-04-16 02:51:38下载
- 积分:1
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electrical lock
一个用Verilog写的电子锁工程,带testbench。(An electronic lock project written in Verilog with testbench.)
- 2020-06-30 05:00:01下载
- 积分:1
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qiangdaqi
本程序为四路抢答器verlog HDL语言工程实例。(This program is four Responder verlog HDL language engineering examples.)
- 2013-10-30 14:48:21下载
- 积分:1
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PWM
自己编写的verilog语言 PWM实现的一种方法希望有用(verilog PWM)
- 2015-04-05 18:23:37下载
- 积分:1
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64point_FFT
64点FFT代码 基4算法 Verilog(64-point FFT code radix-4 algorithm Verilog)
- 2021-01-15 09:48:46下载
- 积分:1
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RS_CC_ENC
OFDM系统新型CC编解码的verilogHDL设计,与RS编码级联,经测试误码率性能提高(OFDM system verilogHDL new CC codec design, coding and RS cascade, tested BER performance improvement)
- 2020-12-31 10:58:59下载
- 积分:1
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uart
it contains pdf file which has vhdl program of uart (universal asynchoronus receiver and transmitter). which very simple and easy to understand
- 2010-04-22 20:47:55下载
- 积分:1
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uart2spi-master
说明: this code works with spi and uart interfaces.
- 2020-07-21 21:10:59下载
- 积分:1
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fir4btp
4tap FIR filter in verilog code
- 2014-01-13 22:30:58下载
- 积分:1