dds

基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像增强处理,平滑,锐化,滤波(System Generator based image processing engineering, multimedia processing FPGA implementation source code, image enhancement, smoothing, sharpening, filtering)

Once the FPGA is located, the rest of the mapping data for the other components can be determined dynamically its section mapping registers.

EDA技术及其应用《序列信号发生器的设计》，包括源文件。(EDA technology and its applications " sequence signal generator design, including source files.)

CORDIC(Coordinate Rotation Digital Computer)算法即坐标旋转数字计算方法。 CORDIC算法,能够通过平移和累加快速实现基础的数学函数,包括三角函数,开方,指数,对数,平方根等函数。(CORDIC (Coordinate Rotation Digital Computer) algorithm for the coordinate rotation digital calculation. CORDIC algorithm can be achieved through the rapid translation and accumulation based on mathematical functions, including trigonometric, square root, exponential, logarithmic, square root and other functions.)

stepper motor module on spartan 6 and 24MHz clock fequency

该程序用vhdl编写的vga显示的小游戏，到时屏幕上会显示一个小球，一根棒子，一面墙，棒子可以通过按键控制来移动。而小球在不停的运动，遇到墙会反弹。(Game written by the program with VHDL VGA display, the screen will display a small ball, a stick, a wall, stick to move through the key control. Ball in constant motion, encountered the wall will bounce.)

键盘计算器，可实现加减乘数运算 基于fpga nios2(Keyboard, calculator, addition and subtraction can be realized based on fpga nios2 multiplier operator)

单片机4路ad模数转换数码管动态显示程序(4-way ad microcontroller analog to digital conversion digital tube dynamic display program)

Verilog code to implment the 16 bits logic multiplier. The output is also 16bits including the document to describe the implement in detail .

RGMII测试程序，在板子测试验证过，可以使用，初学者可以参考下