低通FIR滤波器的设计

用FPGA 是先键盘的程序，is good for you -FPGA is the first keyboard to use the procedure, is good for you

这是一个FIFO_Buffer的verilog代码.(This is a FIFO_Buffer the Verilog code.)

说明：  插值滤波器,用于音频解码调制解调,滤波器系数用移位相加实现(Interpolation filter, audio decoder for modulation and demodulation, filter coefficient shift combined with the realization of)

FIR带通、带阻滤波器设计，需要输入截止频率以及容许偏差。(FIR band pass and band stop filter design)

FPGA UART 发送端程序 verilog语言编写 9600波特率 实用(UART transmit side program verilog language 9600 baud)

这是一个基本的ARM7_Core 有基本功能 但不是太完善-This is a basic ARM7_Core has the basic functions, but not too perfect

8位并行转穿行发送程序，波特率可自行设置，经检验有实用效果(8-bit parallel transfer walk through the sending program, the baud rate can be set up their own practical effect inspection)

这是这本书的第四个版本，现在这个版本不仅提供了VHDL语言的覆盖面，但设计方法的信息，以及。此版本将指导读者通过创建一个VHDL设计的过程中，模拟设计，综合设计，放置和布线设计，使用的重要模拟验证的最终结果，新的技术，称为全速调试，提供了极其快速设计验证。在这个版本的设计，例如已被更新(This is the fourth version of the book and this version now not only provides VHDL language coverage but design methodology information as well. This version will guide the reader through the process of creating a VHDL design, simulating the design, synthesizing the design, placing and routing the design, using VITAL simulation to verify the final result, and a new technique called At-Speed debugging that provides extremely fast design verification. The design example in this version has been updated to reflect.)

采用xilinx的ROMIP核产生类似正弦信号，经过FFt后可以观察结果(Using the xilinx ROMIP nuclear generating similar sinusoidal signal can be observed through the results after FFt)