ISE7.1i 中文教程 适合xilinx的FPGA/CPLD用户

关于ALTERA DE2板上的文档资料，包括应用实例，用户文档和板上常用器件的技术文档(datasheets of ALTERA DE2)

vhdl的一个串行序列信号发生器的设计与实现-vhdl sequence of a Serial Signal Generator Design and Implementation

FPGA编程，经过团体奋战完成，全是底层的IIc和sci通信，完整版。(FPGA programming, after groups fight to the finish, all underlying SCI and IIc communication, full version)

基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,基于视频的运动检测(System Generator based image processing engineering, multimedia processing on FPGA source code, based on video motion detection)

讲述软解调很不错的一片文档，主要阐述的是8PSK的软解调FPGA实现，但对8PSK的软解调原理阐述很清楚，没有多余的东西，但需要注意其中各个调制符号点得顺序。(About soft demodulation of a document is very good, mainly on the soft 8PSK demodulation FPGA, but soft 8PSK demodulation principle describes very clearly, no extra stuff, but need to pay attention to the point where each modulation symbol was in order.)

verilog i2c master rtl+testbench 转自特权同学(verilog i2c master rtl+testbench)

The Date prototype object is itself a Date object (its [[Class]] is "Date") whose value is NaN.

vc707 board ucf xdc files

VHDL fft 源程序，直接运行就可以，很好的一个程序-VHDL fft source code can be run directly, a very good program

altera嵌入式设计大赛文章，车载cots设计实现-Embedded Design Contest altera article, cots Car Design