ADV7513 HDMI条形显示，支持1920*1080，最高收入时钟165MHz，完整的Verilog语言实现，并且有完整的IIC驱动代码

通过verilog语言实现各种基本信号的调制解调过程，包括2psk,qpsk,ppm(Realize the modulation and demodulation process of various basic signals through verilog language, including 2psk, qpsk, ppm)

利用matlab，对偏振控制器进行仿真，最终在邦加球上进行显示(Using matlab, simulation of the polarization controller eventually be displayed on the Poincare Sphere)

说明：  spartan6学习资料，官方资料，用户手册，包括5个主要文件(Spartan 6 Learning Materials, Official Materials)

Verilog 代码固定的点非还原分压器用于执行司的两个 8 位数字。它适用于无符号数字。

FPGA经验总结：时序是设计出来的 我们在做详细设计的时候，对于一些信号的时序肯定会做一些调整的，但是这种时序的调整最多只能波及到本一级模块，而不能影响到整个设计。(FPGA Experience: Timing is designed to do the detailed design of our time, for some signal timing will certainly make some adjustments, but adjust this timing can only spread to up to this level of the module, but not affect the whole design.)

实现DE2_115开发板上配套的500万像素cmos摄像头捕捉到的画面显示在VGA上(DE2_115 development board supporting 5,000,000 pixels cmos camera to capture the screen display in VGA)

通过 ICAP 回读 FPGA内部state register 的状态值。通过状态机控制ICAP，然后写入命令，读取数据，等待三个周期后出现数据。过程中CSIB和RDWRB有一个时序关系，还需要对ICAP输入命令进行bit swap

说明：  通过一个计数器来实现输出信号的占空比要求，可以将duty_cycle分配到拨码开关上,LED分配到发光二极管上,然后调节拨码开关,即可看到LED的亮度发生变化.(The duty cycle of the output signal can be assigned to the dial switch by a counter, and the LED can be assigned to the light emitting diode. Then the brightness of the LED can be seen by adjusting the dial switch.)

用Verilog语言实现QPSK调制，QPSK是一种数字调制方式。它分为绝对相移和相对相移两种。 (Verilog language using QPSK modulation, QPSK is a digital modulation. It is divided into absolute and relative phase shift of the phase shift of two.)

VGA显示FPGA实现的VHDL语言的贪吃蛇游戏设计 本设计分为6个模块主要是扫描模块 VGA现实和控制模块 游戏设计的模块 电源模块等 用QUARTUS2仿真运行(VGA display FPGA VHDL language to realize the Snake game design The design is divided into six modules mainly scanning module VGA module power module and control module reality game design, etc. Simulation run with QUARTUS2)