FPGA的发展

these files are written in verilog but i am uploading in text format

vhdl参考程序，供初学者参考使用-VHDL reference procedures, their use and reference for beginners

这是一个很全的HDB3译码的verilog程序，用于FPGA入门所用，verilog的入门很好的程序(This is a very wide of the HDB3 decoding verilog program for entry-FPGA used, verilog entry procedures for good)

说明：  用于FPGA的I2S接收模块，仅供学习和参考(audio-i2s receive.use fpga.)

《Verilog HDL 程序设计教程》5-"Verilog HDL Design Guide" 5

vhdl项目设置： flv的 -VHDL Project Settings: flv

扰码器的verilog实现,参考802.11a相关标准-Scrambler in verilog implementation

音乐计算器，可实现999以下加减法及与非运算功能，并能够播放两段音乐，可下载到FPGA板子上实现。(Music Calculator)

Browser modularization processing, browser modularization combing, browser modularization expansion

这是本人写的可显示128*64LCD全屏汉字的程序,直接下到片子里即可出现象(需自己定制ROM).想显示第二屏的话只需加一个状态即可.-I write this is the display of 128* Embedded full screen characters procedures, directly to the unit under the blankets will be out phenomenon (it-yourself customized ROM). to the second screen shows only the state can be a plus .